Posted-Date: Mon, 6 Oct 1997 22:21:15 +0200
Date: Mon, 6 Oct 1997 22:21:12 +0200 (CEST)
From: Witek Wnuk <spider@ppp2-cst133.warszawa.tpnet.pl>
To: linux-m68k@lists.linux-m68k.org
Subject: L68K: sys_cacheflush()
Sender: owner-linux-m68k@phil.uni-sb.de
Reply-To: witekw@energopol.com.pl

Hi!

I think there is mistake in sys_cacheflush function
(in arch/m68k/kernel/sys_m68k.c). On 020 or 030 when user requests to flush
only part of cache (scope == FLUSH_SCOPE_LINE), it flushes only longwords
aligned on 16 bytes boundary. As far as i know (and MC68030UM/AD says)
writing address to CAAR and setting CEI or CED bit in CACR causes only one
entry (longword) to be flushed from cache.

Here is the patch.

--- sys_m68k.c-orig	Mon Oct  6 21:51:58 1997
+++ sys_m68k.c	Mon Oct  6 21:53:00 1997
@@ -571,13 +571,13 @@
 				cacr |= 4;
 			if (cache & FLUSH_CACHE_DATA)
 				cacr |= 0x400;
-			len >>= 4;
+			len >>= 2;
 			while (len--) {
 				__asm__ __volatile__ ("movec %1, %%caar\n\t"
 						      "movec %0, %%cacr"
 						      : /* no outputs */
 						      : "r" (cacr), "r" (addr));
-				addr += 16;
+				addr += 4;
 			}
 		} else {
 			/* Flush the whole cache, even if page granularity requested. */


Let me know if i am wrong..


greetings,
	Witek