Subject: new head.S (was Re: Why Mac head.S patches aren't integrated?)
From: "David D. Kilzer" <[email-masked]>
To: Jes Sorensen <[email-masked]>
Cc: Linux-m68k Mailing List <[email-masked]>
Date: Thu, 17 Sep 1998 08:49:43 -0500

Hi,

Attached please find head.S-2.1.120-980917.  The goal here is a drop-in 
replacement for the current head.S in 2.1.120.  Please give it a try if
you are building kernels for non-Mac computers (that should be the 
majority of you who are building kernels on this list :^).

The 2.1.115 version of head.S was looked over by Richard Hirst.  This 
file contains the original Mac patches from 2.1.115, plus fixes by me 
for Geert's recent console font changes, plus Richard's patch after he 
looked 2.1.115 over.  The rest of the changes are for Macintosh support 
that have been carried along since 2.1 kernel development began(?).

BTW, the diff was about 20K larger ungzipped (5K larger gzipped) than the 
file itself, which is why I'm only including the file.  If anyone (Jes?) 
would still like the diff, please let me know.

N.B. Jes, this head.S does not include any of my recent "clean up" patch 
posted to linux-mac68k.  I will wait until this one is approved before
forging ahead with those changes.

Thanks!

Dave

Jes Sorensen <[email-masked]> wrote:
>>>>>> "Richard" == Richard Hirst <[email-masked]> writes:
>
>Richard> There was a bug in the mmu_fixup code - and-ing with 0x2f
>Richard> rather than 0x3f, so it worked sometimes.  Anyway, that is
>Richard> fixed.  If you apply the following patch on top of a
>Richard> mac-2.1.115-vanilla-980830.diff.gz you get a head.S that works
>Richard> for me on VME '060 and '040.  It uses copyback for all memory
>Richard> except page tables, which are writethrough (unless
>Richard> CONFIG_060_WRITETHROUGH selected, in which case everything is
>Richard> writethrough on '060).
>
>Richard> I don't think swtiching to copyback on a Mac should be a
>Richard> problem, as I guess memory above 4MB was copyback anyway.
>
>Richard> Michael, this effectively replaces your patch which tried to
>Richard> integrate my BVME6000 code in to Mac head.S.  I'll leave it up
>Richard> to you to put together a clean patch for Jes :)
>
>Ok if you guys send me a clean patch relative to 2.1.120 I'll give it a
>shot.
>
>Jes

/* -*- mode: asm -*-
**
** head.S -- This file contains the initial boot code for the
**	     Linux/68k kernel.
**
** Copyright 1993 by Hamish Macdonald
**
** 68040 fixes by Michael Rausch
** 68060 fixes by Roman Hodek
** MMU cleanup by Randy Thelen
**
** Atari support by Andreas Schwab, using ideas of Robert de Vries
** and Bjoern Brauel
** VME Support by Richard Hirst
**
** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
** 95/11/18 Richard Hirst: Added MVME166 support
** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
** 			      Magnum- and FX-alternate ram
** 98/04/25 Phil Blundell: added HP300 support
** 1998/08/30 David Kilzer: Added support for fbcon_font_desc structures
**            for linux-2.1.115
**
** This file is subject to the terms and conditions of the GNU General Public
** License. See the file README.legal in the main directory of this archive
** for more details.
**
*/
	
/*
 * Linux startup code.
 *
 * At this point, the boot loader has:
 * Disabled interrupts
 * Disabled caches
 * Put us in supervisor state.
 *
 * The kernel setup code takes the following steps:
 * .  Raise interrupt level
 * .  Set up initial kernel memory mapping.
 *    .  This sets up a mapping of the 4M of memory the kernel is located in.
 *    .  It also does a mapping of any initial machine specific areas.
 * .  Enable the MMU
 * .  Enable cache memories
 * .  Jump to kernel startup
 *
 * Much of the file restructuring was to accomplish:
 * 1) Reduce register dependency through-out the file.
 * 2) Increase use of subroutines to perform functions
 * 3) Increase readability of the code
 *
 * Of course, readability is a subjective issue, so it will never be
 * argued that that goal was accomplished.  It was merely a goal.
 * A key way to help make code more readable is to give good 
 * documentation.  So, the first thing you will find is exaustive
 * write-ups on the structure of the file, and the features of the
 * functional subroutines.
 *
 * General Structure:
 * ------------------
 *	Without a doubt the single largest chunk of head.S is spent
 * mapping the kernel and I/O physical space into the logical range
 * for the kernel.  
 *	There are new subroutines and data structures to make MMU
 * support cleaner and easier to understand.
 * 	First, you will find a routine call "mmu_map" which maps
 * a logical to a physical region for some length given a cache
 * type on behalf of the caller.  This routine makes writing the
 * actual per-machine specific code very simple.
 *	A central part of the code, but not a subroutine in itself,
 * is the mmu_init code which is broken down into mapping the kernel
 * (the same for all machines) and mapping machine-specific I/O
 * regions.
 *	Also, there will be a description of engaging the MMU and
 * caches.
 *	You will notice that there is a chunk of code which
 * can emit the entire MMU mapping of the machine.  This is present
 * only in debug modes and can be very helpful.
 *	Further, there is a new console driver in head.S that is
 * also only engaged in debug mode.  Currently, it's only supported
 * on the Macintosh class of machines.  However, it is hoped that
 * others will plug-in support for specific machines.
 * 
 * ######################################################################
 * 
 * mmu_map
 * -------
 *	mmu_map was written for two key reasons.  First, it was clear
 * that it was very difficult to read the previous code for mapping
 * regions of memory.  Second, the Macintosh required such extensive
 * memory allocations that it didn't make sense to propogate the 
 * existing code any further.
 *	mmu_map requires some parameters:
 * 
 *	mmu_map (logical, physical, length, cache_type)
 * 
 *	While this essentially describes the function in the abstract, you'll
 * find more indepth description of other parameters at the implementation site.
 * 
 * mmu_get_page_table
 * ------------------
 * mmu_get_pointer_table
 * ---------------------
 *	These routines are used by mmu_map to get fresh tables.  They
 * will allocate a new page of memory and consume page tables from that page
 * until the page has been exausted.  Unfortunately, the kernel code uses
 * a wacky and not very efficient mechanism for re-using pages of memory
 * allocated for page tables.  Therefore, while this code does set the kpt
 * global to a correct value upon initial usage, it doesn't help.
 * 
 * mmu_clear_root_table
 * --------------------
 * mmu_clear_pointer_table
 * -----------------------
 * mmu_clear_page_table
 * --------------------
 *	Given a pointer to a table, these routines will clear it.
 * Sometimes writing well factored code can be a source of pride.
 * 
 * ######################################################################
 * 
 * mmu_init
 * --------
 *	Here is where the MMU is initialized for the various platforms.
 * First, the kernel is mapped for all platforms at the address computed
 * as the current address (which is known to be physical) and mapped down
 * to logical 0x01000.  Then there is logic on a per-machine basis.
 * 
 * ######################################################################
 * 
 * mmu_engage
 * ----------
 *	The MMU engagement code is quite extensive and there is ample
 * description of the algorithm in all it's gory detail at the site of the
 * evil deed.  However, allow me to state that magic takes place there.
 * 
 * ######################################################################
 * 
 * mmu_print
 * ---------
 *	This algorithm will print out the page tables of the system as
 * appropriate for an 030 or an 040.  This is useful for debugging purposes
 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
 * 
 * ######################################################################
 * 
 * console_init
 * ------------
 *	The console is also able to be turned off.  The console in head.S
 * is specifically for debugging and can be very useful.  It is surrounded by
 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
 * kernels.  It's basic algorithm is to determine the size of the screen
 * (in height/width and bit depth) and then use that information for
 * displaying an 8x8 font or an 8x16 (widthxheight).  I prefer the 8x8 for
 * debugging so I can see more good data.  But it was trivial to add support
 * for both fonts, so I included it.
 *	Also, the algorithm for plotting pixels is abstracted so that in
 * theory other platforms could add support for different kinds of frame
 * buffers.  This could be very useful.
 * 
 * console_put_penguin
 * -------------------
 *	An important part of any Linux bring up is the penguin and there's
 * nothing like getting the Penguin on the screen!  This algorithm will work
 * on any machine for which there is a console_plot_pixel.
 * 
 * console_scroll
 * --------------
 *	My hope is that the scroll algorithm does the right thing on the
 * various platforms, but it wouldn't be hard to add the test conditions
 * and new code if it doesn't.
 * 
 * console_putc
 * -------------
 * 
 * ######################################################################
 * 
 *	The only register that is passed through out the system are:
 * .  A7 -- Stack Pointer (duh)
 * .  A6 -- Top of Kernel,  available pages are taken from here
 * .  A5 -- Ptr to Root Table
 * .  D5 -- Ptr to __start (physical)
 *	Many other registers are used as passed parameters into
 * functions or used within functions.
 *
 *	Reducing the register usage from a dozen to a few greatly simplified
 * head.S.
 *
 * ######################################################################
 * 
 * options
 * -------
 *	There are many options availble in a build of this file.  I've
 * taken the time to describe them here to save you the time of searching
 * for them and trying to understand what they mean.
 * 
 * CONFIG_xxx:	These are the obvious machine configuration defines created
 * during configuration.  These are defined in include/linux/autoconf.h.
 *
 * CONSOLE:	There is support for head.S console in this file.  This
 * console can talk to a Mac frame buffer, but could easily be extrapolated
 * to extend it to support other platforms.
 * 
 * TEST_MMU:	This is a test harness for running on any given machine but
 * getting an MMU dump for another class of machine.  The classes of machines
 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
 * and any of the models (030, 040, 060, etc.).
 *
 *	NOTE:	TEST_MMU is NOT permanent!  It is scheduled to be removed
 *		When head.S boots on Atari, Amiga, Macintosh, and VME
 *		machines.  At that point the underlying logic will be
 *		believed to be solid enough to be trusted, and TEST_MMU
 *		can be dropped.  Do note that that will clean up the
 *		head.S code significantly as large blocks of #if/#else
 *		clauses can be removed.
 * 
 * MMU_NOCACHE_KERNEL:	On the Macintosh platform there was an inquiry into
 * determing why devices don't appear to work.  A test case was to remove
 * the cacheability of the kernel bits.
 * 
 * MMU_PRINT:	There is a routine built into head.S that can display the
 * MMU data structures.  It outputs its result through the Lserial_putc
 * interface.  So where ever that winds up driving data, that's where the
 * mmu struct will appear.  On the Macintosh that's typically the console.
 * 
 * SERIAL_DEBUG:	There are a series of putc() macro statements
 * scattered through out the code to give progress of status to the
 * person sitting at the console.  This constant determines whether those
 * are used.
 * 
 * Atari constants:
 * USE_PRINTER:	Use the printer port for serial debug.
 * USE_SCC_B:	Use the SCC port A (Serial2) for serial debug.
 * USE_SCC_A:	Use the SCC port B (Modem2) for serial debug.
 * USE_MFP:	Use the ST-MFP port (Modem1) for serial debug. 
 * 
 * DEBUG:	This is the standard DEBUG flag that can be set for building
 *		the kernel.  It has the effect adding additional tests into
 *		the code.
 * 
 * MMU_PRINT_PAGE_USAGE:
 *		Print the number of pages used by the MMU tables.
 * FONT_6x11:
 * FONT_8x8:
 * FONT_8x16:
 *		In theory these could be determined at run time or handed
 *		over by the booter.  But, let's be real, it's a fine hard
 *		coded value.  (But, you will notice the code is run-time
 *		flexible!)  A pointer to the font's struct fbcon_font_desc
 *		is kept locally in Lconsole_font.  It is used to determine
 *		font size information dynamically.
 */

#include <linux/config.h>
#include <linux/linkage.h>
#include <asm/bootinfo.h>
#include <asm/setup.h>
#include <asm/pgtable.h>
#if defined(CONFIG_MAC)
#include <video/font.h>		/* offsets for struct fbcon_font_desc */
#endif

#if defined(CONFIG_MAC)
#define CONSOLE
#endif
#undef MMU_PRINT
#undef MMU_NOCACHE_KERNEL
#define SERIAL_DEBUG
#undef DEBUG
#undef MMU_PRINT_PAGE_USAGE

/*
 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
 * The 8x8 font is harder to read but fits more on the screen.
 */
#define FONT_8x8 	/* default */
/* #define FONT_8x16	/* 2nd choice */
/* #define FONT_6x11	/* 3rd choice */
	
.globl SYMBOL_NAME(kernel_pg_dir)
.globl SYMBOL_NAME(kpt)
.globl SYMBOL_NAME(availmem)
.globl SYMBOL_NAME(m68k_pgtable_cachemode)
.globl SYMBOL_NAME(kernel_pmd_table)
.globl SYMBOL_NAME(swapper_pg_dir)

#if defined(CONFIG_ATARI)
.globl SYMBOL_NAME(atari_mch_type)
#endif

#if defined(CONFIG_MAC)
.globl SYMBOL_NAME(mac_booter_data)
.globl SYMBOL_NAME(compat_bi)
.globl SYMBOL_NAME(mac_videobase)
.globl SYMBOL_NAME(mac_videodepth)
.globl SYMBOL_NAME(mac_rowbytes)
#endif

#if defined(CONFIG_MVME16x)
.globl SYMBOL_NAME(mvme_bdid_ptr)
#endif

/*
 * Added m68k_supervisor_cachemode for 68060 boards where some drivers
 * need writethrough caching for supervisor accesses.  Drivers known to
 * be effected are 53c7xx.c and apricot.c (when used on VME boards).
 * Richard Hirst.
 */

#ifdef CONFIG_060_WRITETHROUGH
.globl SYMBOL_NAME(m68k_supervisor_cachemode)
#endif

D6B_0460 = 16		/* indicates 680[46]0 in d6 */
D6B_060  = 17		/* indicates 68060 in d6 */
D6F_040  = 1<<D6B_0460
D6F_060  = (1<<D6B_0460)+(1<<D6B_060)

CPUTYPE_040	= 1	/* indicates an 040 */
CPUTYPE_060	= 2	/* indicates an 060 */
CPUTYPE_0460	= 3	/* if either above are set, this is set */

/* Translation control register */
TC_ENABLE = 0x8000
TC_PAGE8K = 0x4000
TC_PAGE4K = 0x0000

/* Transparent translation registers */
TTR_ENABLE	= 0x8000	/* enable transparent translation */
TTR_ANYMODE	= 0x4000	/* user and kernel mode access */
TTR_KERNELMODE	= 0x2000	/* only kernel mode access */
TTR_USERMODE	= 0x0000	/* only user mode access */
TTR_CI		= 0x0400	/* inhibit cache */
TTR_RW		= 0x0200	/* read/write mode */
TTR_RWM		= 0x0100	/* read/write mask */
TTR_FCB2	= 0x0040	/* function code base bit 2 */
TTR_FCB1	= 0x0020	/* function code base bit 1 */
TTR_FCB0	= 0x0010	/* function code base bit 0 */
TTR_FCM2	= 0x0004	/* function code mask bit 2 */
TTR_FCM1	= 0x0002	/* function code mask bit 1 */
TTR_FCM0	= 0x0001	/* function code mask bit 0 */

/* Cache Control registers */
CC6_ENABLE_D	= 0x80000000	/* enable data cache (680[46]0) */
CC6_FREEZE_D	= 0x40000000	/* freeze data cache (68060) */
CC6_ENABLE_SB	= 0x20000000	/* enable store buffer (68060) */
CC6_PUSH_DPI	= 0x10000000	/* disable CPUSH invalidation (68060) */
CC6_HALF_D	= 0x08000000	/* half-cache mode for data cache (68060) */
CC6_ENABLE_B	= 0x00800000	/* enable branch cache (68060) */
CC6_CLRA_B	= 0x00400000	/* clear all entries in branch cache (68060) */
CC6_CLRU_B	= 0x00200000	/* clear user entries in branch cache (68060) */
CC6_ENABLE_I	= 0x00008000	/* enable instruction cache (680[46]0) */
CC6_FREEZE_I	= 0x00004000	/* freeze instruction cache (68060) */
CC6_HALF_I	= 0x00002000	/* half-cache mode for instruction cache (68060) */
CC3_ALLOC_WRITE	= 0x00002000	/* write allocate mode(68030) */
CC3_ENABLE_DB	= 0x00001000	/* enable data burst (68030) */
CC3_CLR_D	= 0x00000800	/* clear data cache (68030) */
CC3_CLRE_D	= 0x00000400	/* clear entry in data cache (68030) */
CC3_FREEZE_D	= 0x00000200	/* freeze data cache (68030) */
CC3_ENABLE_D	= 0x00000100	/* enable data cache (68030) */
CC3_ENABLE_IB	= 0x00000010	/* enable instruction burst (68030) */
CC3_CLR_I	= 0x00000008	/* clear instruction cache (68030) */
CC3_CLRE_I	= 0x00000004	/* clear entry in instruction cache (68030) */
CC3_FREEZE_I	= 0x00000002	/* freeze instruction cache (68030) */
CC3_ENABLE_I	= 0x00000001	/* enable instruction cache (68030) */

/* Miscellaneous definitions */
PAGESIZE	= 4096
PAGESHIFT	= 12

ROOT_TABLE_SIZE	= 128
PTR_TABLE_SIZE	= 128
PAGE_TABLE_SIZE	= 64
ROOT_INDEX_SHIFT = 25
PTR_INDEX_SHIFT  = 18
PAGE_INDEX_SHIFT = 12

TABLENR_4MB	= 16	/* # of page tables needed to page 4 MB */
TABLENR_16MB	= 64	/* same for 16 MB */

#if !defined(CONSOLE) && !defined(DEBUG) && defined(SERIAL_DEBUG)
#  define putc_trace(c)   moveq &c,%d7; jbsr Lserial_putc
#  define putc(c)
#  define puts(x)
#  define putr()	putc_trace(13) ; putc_trace(10)
#  define putn(nr)	
#elif defined(DEBUG) || defined(CONSOLE)
#  define putc_trace(c)   moveq &c,%d7; jbsr Lserial_putc
#  define putc(c) moveq &c,%d7; jbsr Lserial_putc
#  define puts(x)  movel %a0,%sp@-; \
		   lea %pc@(897f),%a0 ; \
		   jbsr Lserial_puts ; \
		   movel %sp@+,%a0 ; \
		   jbra 898f ; \
	897:	   .string x ; \
		   .byte 0 ; \
		   .even ; \
	898:
#  define putr()	putc(13) ; putc(10) 
#  define putn(nr)	movel nr,%d7; jbsr Lserial_putnum
#else /* ! DEBUG && ! SERIAL_DEBUG */
#  define putc_trace(c)
#  define putc(c)
#  define puts(x)
#  define putr()
#  define putn(nr)	
#endif

/*
 * mmu_map() register usage
 *
 * Here a symbolic names for the mmu_map() parameters.
 */
#define MAP_PHYS	%a1
#define MAP_LOG		%a0
#define MAP_CACHE	%d1
#define MAP_LENGTH	%d0

#define MMU_MAP(log,phys,leng,cache)	movel	log,MAP_LOG; \
					movel	phys,MAP_PHYS; \
					movel	leng,MAP_LENGTH; \
					movel	cache,MAP_CACHE; \
					jbsr	mmu_map
	
#define MMU_MAP_EQ(addr,leng,cache)	movel	addr,MAP_LOG; \
					movel	MAP_LOG,MAP_PHYS; \
					movel	leng,MAP_LENGTH; \
					movel	cache,MAP_CACHE; \
					jbsr	mmu_map
	
#define MMU_MAP_TT(addr,leng,cache)	movel	addr,MAP_LOG; \
					movel	MAP_LOG,MAP_PHYS; \
					movel	leng,MAP_LENGTH; \
					movel	cache,MAP_CACHE; \
					jbsr	mmu_map_tt
	
#define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
#define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
#define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
#define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
#define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
#define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
	
#define is_040_or_060(lab)	btst &CPUTYPE_0460,%pc@(Lcputype+3); jne lab
#define is_not_040_or_060(lab)	btst &CPUTYPE_0460,%pc@(Lcputype+3); jeq lab
#define is_040(lab)		btst &CPUTYPE_040,%pc@(Lcputype+3); jne lab
#define is_060(lab)		btst &CPUTYPE_060,%pc@(Lcputype+3); jne lab
#define is_not_060(lab)		btst &CPUTYPE_060,%pc@(Lcputype+3); jeq lab

/* On the HP300 we use the on-board LEDs for debug output before
   the console is running.  Writing a 1 bit turns the corresponding LED
   _off_ - on the 340 bit 7 is towards the back panel of the machine.  */
#ifdef CONFIG_HP300
#define leds(x) is_not_hp300(42f) ; moveb #(x),%d7 ; jbsr Lset_leds; 42:
#else
#define leds(x)
#endif

.text
ENTRY(_stext)
/*
 * Version numbers of the bootinfo interface
 * The area from _stext to _start will later be used as kernel pointer table
 */
	bras	1f	/* Jump over bootinfo version numbers */

	.long	BOOTINFOV_MAGIC
	.long	MACH_AMIGA, AMIGA_BOOTI_VERSION
	.long	MACH_ATARI, ATARI_BOOTI_VERSION
	.long	MACH_MVME16x, MVME16x_BOOTI_VERSION
	.long	MACH_BVME6000, BVME6000_BOOTI_VERSION
	.long	MACH_MAC, MAC_BOOTI_VERSION
	.long	0
1:	jra	SYMBOL_NAME(_start)

.equ	SYMBOL_NAME(kernel_pmd_table),SYMBOL_NAME(_stext)
.equ	SYMBOL_NAME(kernel_pg_dir),SYMBOL_NAME(kernel_pmd_table)
.equ	SYMBOL_NAME(swapper_pg_dir),SYMBOL_NAME(kernel_pg_dir)+(ROOT_TABLE_SIZE<<2)
.equ	Lavail_pmd_table,SYMBOL_NAME(swapper_pg_dir)+(ROOT_TABLE_SIZE<<2)

.equ	.,SYMBOL_NAME(_stext)+PAGESIZE

ENTRY(_start)

/*
 * Setup initial stack pointer
 */
	lea	%pc@(SYMBOL_NAME(_stext)),%sp
	
/*
 * Record the CPU and machine type.
 */

	movew	#BI_MACHTYPE,%d0
	jbsr	Lget_bi_record
	movel	%a0@,%d0
	lea	%pc@(SYMBOL_NAME(m68k_machtype)),%a0
	movel	%d0,%a0@
	movew	#BI_FPUTYPE,%d0
	jbsr	Lget_bi_record
	movel	%a0@,%d0
	lea	%pc@(SYMBOL_NAME(m68k_fputype)),%a0
	movel	%d0,%a0@
	movew	#BI_MMUTYPE,%d0
	jbsr	Lget_bi_record
	movel	%a0@,%d0
	lea	%pc@(SYMBOL_NAME(m68k_mmutype)),%a0
	movel	%d0,%a0@
	movew	#BI_CPUTYPE,%d0
	jbsr	Lget_bi_record
	movel	%a0@,%d0
	lea	%pc@(SYMBOL_NAME(m68k_cputype)),%a0
	movel	%d0,%a0@

#if defined(CONFIG_MAC)
/*
 * For Macintosh, we need to determine the display parameters early (at least 
 * while debugging it).
 */

	is_not_mac(Ltest_notmac)

	movew	#BI_MAC_VADDR,%d0
	jbsr	Lget_bi_record
	movel	%a0@,%d0
	lea	%pc@(SYMBOL_NAME(mac_videobase)),%a0
	movel	%d0,%a0@

	movew	#BI_MAC_VDEPTH,%d0
	jbsr	Lget_bi_record
	movel	%a0@,%d0
	lea	%pc@(SYMBOL_NAME(mac_videodepth)),%a0
	movel	%d0,%a0@

	movew	#BI_MAC_VDIM,%d0
	jbsr	Lget_bi_record
	movel	%a0@,%d0
	lea	%pc@(SYMBOL_NAME(mac_dimensions)),%a0
	movel	%d0,%a0@

	movew	#BI_MAC_VROW,%d0
	jbsr	Lget_bi_record
	movel	%a0@,%d0
	lea	%pc@(SYMBOL_NAME(mac_rowbytes)),%a0
	movel	%d0,%a0@

#if 1
	/*
	 * Clear the screen
	 */
	lea	%pc@(SYMBOL_NAME(mac_videobase)),%a0
	movel	%a0@,%a1
	lea	%pc@(SYMBOL_NAME(mac_dimensions)),%a0
	movel	%a0@,%d1
	andl	#0xFFFF,%d1	/* rows */
	subql	#1,%d1
	lea	%pc@(SYMBOL_NAME(mac_rowbytes)),%a0
loopy2:
	movel	%a0@,%d0
	subql	#1,%d0
loopx2:
	moveb	#0x55, %a1@+
	dbra	%d0,loopx2
	dbra	%d1,loopy2
#endif
	/*
	 * clobbered %d0,so restore it
	 */
	lea	%pc@(SYMBOL_NAME(m68k_cputype)),%a0
	movel	%a0@,%d0

Ltest_notmac:
#endif /* CONFIG_MAC */

/*
 * There are ultimately two pieces of information we want for all kinds of
 * processors CpuType and CacheBits.  The CPUTYPE was passed in from booter
 * and is converted here from a booter type definition to a separate bit
 * number which allows for the standard is_0x0 macro tests.
 */
	/*
	 * Test the BootInfo cputype for 060
	 */
	/*
	 * Assume it's an 020/030
	 */
	clrl	%d6
	
	btst	#CPUB_68060,%d0
	jeq	1f
	bset	#CPUTYPE_060,%d6
	bset	#CPUTYPE_0460,%d6
	jra	2f
	
1:	/*
	 * Test the BootInfo cputype for 040
	 */
	btst	#CPUB_68040,%d0
	jeq	2f
	bset	#CPUTYPE_040,%d6
	bset	#CPUTYPE_0460,%d6
	
2:
	/*
	 * Record the cpu type
	 */
	lea	%pc@(Lcputype),%a0
	movel	%d6,%a0@
	
	/*
	 * NOTE:
	 *
	 * Now the macros are valid:
	 *	is_040_or_060
	 *	is_not_040_or_060
	 *	is_040
	 *	is_060
	 *	is_not_060
	 */
	
	/*
	 * Determine the cache mode for pages holding MMU tables
	 */
	is_not_040_or_060(Lcachetype020)
	
	/*
	 * '040 or '060
	 * d6 := cacheable write-through 
	 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
	 * but we have been using write-through since at least 2.0.29 so I
	 * guess it is OK.
	 */

#if defined(CONFIG_060_WRITETHROUGH)
	/*
	 * If this is a 68060 board using drivers with cache coherency
	 * problems, then supervisor memory accesses need to be write-through
	 * also; otherwise, we want copyback.
	 */

	movel	#_PAGE_CACHE040W,%d6
	is_060(Lset_sup)
	move.w	#_PAGE_CACHE040,%d6
Lset_sup:
  	lea	%pc@(SYMBOL_NAME(m68k_supervisor_cachemode)),%a0
	movel	%d6,%a0@
#endif /* CONFIG_060_WRITETHROUGH */

	movel	#_PAGE_CACHE040W,%d6
	jbra	Lsave_cachetype

Lcachetype020:
	/*
	 * '020 or '030
	 * d6 := cache bits unused (after mapping the kernel!)
	 */
	moveql	#0,%d6
Lsave_cachetype:
	/*
	 * Save cache mode for page tables
	 */
	lea	%pc@(SYMBOL_NAME(m68k_pgtable_cachemode)),%a0
	movel	%d6,%a0@

/*
 * raise interrupt level
 */
	movew	#0x2700,%sr

/*
   If running on an Atari, determine the I/O base of the
   serial port and test if we are running on a Medusa or Hades.
   This test is necessary here, because on the Hades the serial
   port is only accessible in the high I/O memory area.

   The test whether it is a Medusa is done by writing to the byte at
   phys. 0x0. This should result in a bus error on all other machines.

   ...should, but doesn't. The Afterburner040 for the Falcon has the
   same behaviour (0x0..0x7 are no ROM shadow). So we have to do
   another test to distinguish Medusa and AB040. This is a
   read attempt for 0x00ff82fe phys. that should bus error on a Falcon
   (+AB040), but is in the range where the Medusa always asserts DTACK.

   The test for the Hades is done by reading address 0xb0000000. This
   should give a bus error on the Medusa.
 */

#ifdef CONFIG_ATARI
	is_not_atari(Lnotypetest)

	/* get special machine type (Medusa/Hades/AB40) */
	moveq	#0,%d3 /* default if tag doesn't exist */
	movew	#BI_ATARI_MCH_TYPE,%d0
	jbsr	Lget_bi_record
	tstl	%d0
	jbmi	1f
	movel	%a0@,%d3
	lea	%pc@(SYMBOL_NAME(atari_mch_type)),%a0
	movel	%d3,%a0@
1:	
	/* On the Hades, the iobase must be set up before opening the
	 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
	moveq	#0,%d0
	cmpl	#ATARI_MACH_HADES,%d3
	jbne	1f
	movel	#0xff000000,%d0		/* Hades I/O base addr: 0xff000000 */
1:	lea     %pc@(Liobase),%a0
	movel   %d0,%a0@
	
Lnotypetest:
#endif

/*
 * Initialize serial port
 */
	jbsr Lserial_init

	putr()
	putc_trace('A')

/*
 * Get address at end of bootinfo and
 * round up to a page boundary.
 * Note: This hack uses two 'features' of the bi_record:
 *  (1)  When the item searched for isn't found, a0 points
 *       to the end of the structure;
 *  (2)  #0 is an invalid (and never present) bi_record element.
 */
	moveq	#0,%d0
	jbsr	Lget_bi_record
	addw	#PAGESIZE-1,%a0
	movel	%a0,%d0
	andl	#-PAGESIZE,%d0
	movel	%d0,%a6

/*
 * %a6 now contains the address to the 
 * next free block beyond the kernel
 */

	putc_trace('B')

/*
 * Save physical start address of kernel
 */
	lea	%pc@(SYMBOL_NAME(_stext)-PAGESIZE:w),%a0
	movel	%a0,%d5

	putc_trace('C')

	leds(0x4)

/*
 *	mmu_init
 *	
 *	This block of code does what's necessary to map in the various kinds
 *	of machines for execution of Linux.  First, it's clear there
 *	has to be a root table, so that is cleared.  Then, the kernel
 *	has to be mapped, so the kernel is mapped low.  Then, it's on
 *	to machine specific code where specific address ranges are
 *	mapped depending on current I/O configurations.
 *	
 *	Begin:
 *		%a6 is an input to this routine.  %a6 must point to
 *			the first available byte of memory on a virgin page.
 *		%d5 is the start of the kernel's physical address
 *	
 *	End:
 *		%a5 will point to the root table.
 *		%a6 will (likely) have been modified during this
 *			call.
 *	
 *	
 *	
 */
mmu_init:

	putc_trace('D')
	
/*
 * initialize the kernel root table.
 */
	lea	%pc@(SYMBOL_NAME(kernel_pg_dir)),%a5
	jbsr	mmu_clear_root_table
	
	putc_trace('E')
	
	lea	%pc@(SYMBOL_NAME(Lavail_pmd_table)),%a4
	jbsr	mmu_clear_pointer_table

	putc_trace('F')
	
/*
 * map the first 4 MB of kernel code & data
 */

#if defined(CONFIG_060_WRITETHROUGH)
	movel	%pc@(m68k_supervisor_cachemode),%d2
	addil	#_PAGE_GLOBAL040+_PAGE_ACCESSED,%d2
	MMU_MAP(#0,%d5,#4*1024*1024,%d2)
#else
	MMU_MAP(#0,%d5,#4*1024*1024,#_PAGE_GLOBAL040+_PAGE_CACHE040+_PAGE_ACCESSED)
#endif

	/* Clear the pointer table to use, and page table to use */
	moveq	#0,%d0
	movel	%d0,%a4
	movel	%d0,%a3

	putc_trace('G')

#if defined(CONFIG_AMIGA)

mmu_init_amiga:
	
	is_not_amiga(mmu_init_not_amiga)
/* 
 * mmu_init_amiga
 */

	putc_trace('H')

	is_not_040_or_060(1f)

	/*
	 * 040: Map the 16Meg range physical 0x0 upto logical 0x8000.0000
	 */
	MMU_MAP(#0x80000000,#0,#0x01000000,#_PAGE_GLOBAL040+_PAGE_NOCACHE_S+_PAGE_ACCESSED)
	
	jbra	mmu_init_done

1:	
	/*
	 * 030:	Map the 32Meg range physical 0x0 upto logical 0x8000.0000
	 */
	MMU_MAP(#0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030+_PAGE_ACCESSED)
	
	jbra	mmu_init_done
	
mmu_init_not_amiga:
#endif

#if defined(CONFIG_ATARI)

mmu_init_atari:

	is_not_atari(mmu_init_not_atari)
	
	putc_trace('I')
	
/* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
   the last 16 MB of virtual address space to the first 16 MB (i.e.
   0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
   needed. I/O ranges are marked non-cachable.

   For the Medusa it is better to map the I/O region transparently
   (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
   accessible only in the high area.

   On the Hades all I/O registers are only accessible in the high
   area.
*/

	/* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
	moveq	#0,%d0
	movel	%pc@(SYMBOL_NAME(atari_mch_type)),%d3
	cmpl	#ATARI_MACH_MEDUSA,%d3
	jbeq	2f
	cmpl	#ATARI_MACH_HADES,%d3
	jbne	1f
2:	movel	#0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
1:	movel	%d0,%d3

	is_040_or_060(Lspata68040)

	/* Map everything non-cacheable, though not all parts really
	 * need to disable caches (crucial only for 0xffc000..0xffffff
	 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
	 * isn't really used, except for sometimes peeking into the
	 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
	 * this. */
	MMU_MAP(#0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030+_PAGE_ACCESSED)

	jbra	mmu_init_done
	
Lspata68040:
	
	MMU_MAP(#0xff000000,%d3,#0x01000000,#_PAGE_GLOBAL040+_PAGE_NOCACHE_S+_PAGE_ACCESSED)
	
	jbra	mmu_init_done

mmu_init_not_atari:
#endif

#ifdef CONFIG_HP300
	is_not_hp300(Lnothp300)

/* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
   by mapping 32MB from 0xf0xxxxxx -> 0x00xxxxxx) using an 030 early 
   termination page descriptor.  The ROM mapping is needed because the LEDs 
   are mapped there too.  */

	MMU_MAP(#0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE030+_PAGE_ACCESSED)

#if 0
	movel	#_PAGE_NOCACHE030+_PAGE_PRESENT+_PAGE_ACCESSED,%d0
	movel	%d0,%a5@(0x78<<2)
#endif

Lnothp300:

#endif

#if defined(CONFIG_MVME16x)
	
	is_not_mvme16x(Lnot16x)

	/* Get pointer to board ID data */
	movel	%d2,%sp@-
	.long	0x4e4f0070		/* trap 0x70 - .BRD_ID */
	movel	%sp@+,%d2
	lea	%pc@(SYMBOL_NAME(mvme_bdid_ptr)),%a0
	movel	%d2,%a0@

	/*
	 * On MVME16x we have already created kernel page tables for
	 * 4MB of RAM at address 0, so now need to do a transparent
	 * mapping of the top of memory space.  Make it 0.5GByte for now.
	 * Supervisor only access, so transparent mapping doesn't
	 * clash with User code virtual address space.
	 * this covers IO devices, PROM and SRAM.  The PROM and SRAM
	 * mapping is needed to allow 167Bug to run.
	 * IO is in the range 0xfff00000 to 0xfffeffff.
	 * PROM is 0xff800000->0xffbfffff and SRAM is
	 * 0xffe00000->0xffe1ffff.
	 */

	MMU_MAP_TT(#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S+_PAGE_ACCESSED)
	
	jbra	mmu_init_done
	
Lnot16x:
#endif	/* CONFIG_MVME162 | CONFIG_MVME167 */

#if defined(CONFIG_BVME6000)
	
	is_not_bvme6000(Lnot6000)

	/*
	 * On BVME6000 we have already created kernel page tables for
	 * 4MB of RAM at address 0, so now need to do a transparent
	 * mapping of the top of memory space.  Make it 0.5GByte for now,
	 * so we can access on-board i/o areas.
	 * Supervisor only access, so transparent mapping doesn't
	 * clash with User code virtual address space.
	 */

	MMU_MAP_TT(#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S+_PAGE_ACCESSED)
	
	jbra	mmu_init_done
	
Lnot6000:
#endif /* CONFIG_BVME6000 */

/* 
 * mmu_init_mac
 * 
 * The Macintosh mappings are less clear.
 * 
 * Even as of this writing, it is unclear how the
 * Macintosh mappings will be done.  However, as
 * the first author of this code I'm proposing the
 * following model:
 * 
 * Map the kernel (that's already done),
 * Map the I/O (on most machines that's the
 * 0x5000.0000 ... 0x5200.0000 range,
 * Map the video frame buffer using as few pages
 * as absolutely (this requirement mostly stems from
 * the fact that when the frame buffer is at
 * 0x0000.0000 then we know there is valid RAM just
 * above the screen that we don't want to waste!).
 *
 * By the way, if the frame buffer is at 0x0000.0000
 * then the Macintosh is known as an RBV based Mac.
 * 
 * By the way 2, the code currently maps in a bunch of
 * regions.  But I'd like to cut that out.  (And move most
 * of the mappings up into the kernel proper ... or only
 * map what's necessary.)
 */

#if defined(CONFIG_MAC)

mmu_init_mac:
	
	is_not_mac(mmu_init_not_mac)

	putc_trace('J')
	
	lea	%pc@(SYMBOL_NAME(mac_videobase)),%a0
	lea	%pc@(Lconsole_video_virtual),%a1
	movel	%a0@,%a1@

	is_not_040_or_060(1f)
	
	movel	#_PAGE_GLOBAL040+_PAGE_NOCACHE_S+_PAGE_ACCESSED,MAP_CACHE
	jbra	2f
1:		
	movel	#_PAGE_NOCACHE030+_PAGE_ACCESSED,MAP_CACHE
2:	
	/*
	 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
	 */

	/* Calculate screen size */
	clrl	%d0
	lea	%pc@(SYMBOL_NAME(mac_dimensions)),%a0
	movew	%a0@,%d0 		/* d0 = screen height in pixels */

	lea	%pc@(SYMBOL_NAME(mac_rowbytes)),%a0
	mulul	%a0@,%d0		/* scan line bytes x num scan lines */
	lea	%pc@(SYMBOL_NAME(mac_videobase)),%a0
	movel	%a0@,%d2		/* grab screen offset from start of a page */
	andl	#PAGESIZE-1,%d2		/* ... offset from start of page ... */
	addl	%d2,%d0			/* add it to N bytes needed for screen for mapping purposes! */
	addl	#PAGESIZE-1,%d0		/* Round up to page alignment */
	andl	#-PAGESIZE,%d0		/* d0 is now the number of 4K pages for the screen */

	movel	%a0@,%d2
	andl	#PAGESIZE-1,%d2
	addl	#0xF0000000,%d2
	lea	%pc@(Lconsole_video_virtual),%a1
	movel	%d2,%a1@		/* Update the console_video address */
	movel	%a0@,%d2
	andl	#-PAGESIZE,%d2

	MMU_MAP(#0xF0000000,%d2,MAP_LENGTH,MAP_CACHE)
	MMU_MAP_EQ(#0x50000000,#0x02000000,MAP_CACHE)
	MMU_MAP_EQ(#0x60000000,#0x00400000,MAP_CACHE)
	MMU_MAP_EQ(#0x9C000000,#0x00400000,MAP_CACHE)
	MMU_MAP_TT(#0xF8000000,#0x08000000,MAP_CACHE)
	
	jbra	mmu_init_done
	
mmu_init_not_mac:
#endif

mmu_init_done:		
	
	putc_trace('K')
	leds(0x8)

/*
 * mmu_fixup
 * 
 * On the 040 class machines, all pages that are used for the
 * mmu have to be fixed up. According to Motorola, pages holding mmu
 * tables should be non-cacheable on a '040 and write-through on a
 * '060. But analysis of the reasons for this, and practical
 * experience, showed that write-through also works on a '040.
 *
 * So, we'll walk through the MMU table to determine which pages were
 * allocated.  An alternative would be to "know" what pages were
 * allocated above.  But that's fraught with maintenance problems.
 * It's easier to walk the table.
 * 
 */
#if defined(CONFIG_M68040) || defined(CONFIG_M68060)

mmu_fixup:
	
	is_not_040_or_060(mmu_fixup_done)
	
#if defined(MMU_NOCACHE_KERNEL)
	jbra	mmu_fixup_done
#endif
	
	moveml	%d0-%d5/%a0,%sp@-
	
	movel	%a5,%a0
	jbsr	mmu_fixup_page_mmu_cache
	
	movel	#ROOT_TABLE_SIZE-1,%d5
1:	
	movel	%a5@(%d5*4),%d2
	movel	%d2,%d0
	andb	#_PAGE_TABLE,%d0
	jbeq	4f

	movel	%d2,%a0
	jbsr	mmu_fixup_page_mmu_cache
	
	andl	#_TABLE_MASK,%d2
	movel	%d2,%a4
	movel	#PTR_TABLE_SIZE-1,%d4

2:
	movel	%a4@(%d4*4),%d2
	movel	%d2,%d0
	andb	#_PAGE_TABLE,%d0
	jbeq	3f

	movel	%d2,%a0
	jbsr	mmu_fixup_page_mmu_cache
	
3:
	dbra	%d4,2b

4:
	dbra	%d5,1b

	moveml	%sp@+,%d0-%d5/%a0

	jbra	mmu_fixup_done

mmu_fixup_page_mmu_cache:
	moveml	%a0/%d0-%d5,%sp@-

	/* Calculate the offset in the root table 
	 */
	movel	%a0,%d5
	andil	#0xfe000000,%d5
	roll	#7,%d5

	/* Calculate the offset in the pointer table 
	 */
	movel	%a0,%d4
	andil	#0x01fc0000,%d4
	lsrl	#2,%d4
	swap	%d4
	
	/* Calculate the offset in the page table
	 */
	movel	%a0,%d3
	andil	#0x0003f000,%d3
	lsll	#4,%d3
	swap	%d3

	/*
	 * Find the page table entry (PTE) for the page
	 */
	movel	%a5@(%d5*4),%d0
	andil	#_TABLE_MASK,%d0
	movel	%d0,%a0
	movel	%a0@(%d4*4),%d0
	andil	#0xffffff00,%d0
	movel	%d0,%a0
	movel	%a0@(%d3*4),%d0
	/*
	 * Set cache mode to cacheable write through
	 */
	andil	#_CACHEMASK040,%d0
	orl	%pc@(SYMBOL_NAME(m68k_pgtable_cachemode)),%d0
	movel	%d0,%a0@(%d3*4)
	
	moveml	%sp@+,%a0/%d0-%d5
	rts
	
mmu_fixup_done:
#endif /* CONFIG_M68040 && CONFIG_M68060 */
	
#if defined(MMU_PRINT)
	jbsr	mmu_print
#endif

/* 
 * mmu_engage
 * 
 * This chunk of code performs the gruesome task of engaging the MMU.
 * The reason its gruesome is because when the MMU becomes engaged it
 * maps logical addresses to physical addresses.  The Program Counter
 * register is then passed through the MMU before the next instruction
 * is fetched (the instruction following the engage MMU instruction).
 * This may mean one of two things:
 * 1. The Program Counter falls within the logical address space of
 *    the kernel of which there are two sub-possibilities:
 *    A. The PC maps to the correct instruction (logical PC == physical
 *       code location), or
 *    B. The PC does not map through and the processor will read some
 *       data (or instruction) which is not the logically next instr.
 *    As you can imagine, A is good and B is bad.
 * Alternatively,
 * 2. The Program Counter does not map through the MMU.  The processor
 *    will take a Bus Error.
 * Clearly, 2 is bad.
 * It doesn't take a wiz kid to figure you want 1.A.
 * This code creates that possibility.
 * There are two possible 1.A. states (we now ignore the other above states):
 * A. The kernel is located at physical memory addressed the same as
 *    the logical memory for the kernel, i.e., 0x01000.
 * B. The kernel is located some where else.  e.g., 0x0400.0000
 * 
 *    Under some conditions the Macintosh can look like A or B.
 * [A friend and I once noted that Apple hardware engineers should be
 * wacked twice each day: once when they show up at work (as in, Whack!,
 * "This is for the screwy hardware we know you're going to design today."),
 * and also at the end of the day (as in, Whack! "I don't know what
 * you designed today, but I'm sure it wasn't good."). -- rst]
 * 
 * This code works on the following premise:
 * If the kernel start (%d5) is within the first 16 Meg of RAM,
 * then create a mapping for the kernel at logical 0x8000.0000 to
 * the physical location of the pc.  And, create a transparent
 * translation register for the first 16 Meg.  Then, after the MMU
 * is engaged, the PC can be moved up into the 0x8000.0000 range
 * and then the transparent translation can be turned off and then
 * the PC can jump to the correct logical location and it will be
 * home (finally).  This is essentially the code that the Amiga used
 * to use.  Now, it's generalized for all processors.  Which means
 * that a fresh (but temporary) mapping has to be created.  The mapping
 * is made in page 0 (an as of yet unused location -- except for the
 * stack!).  This temporary mapping will only require 1 pointer table
 * and a single page table (it can map 256K).
 *
 * OK, alternatively, imagine that the Program Counter is not within
 * the first 16 Meg.  Then, just use Transparent Translation registers
 * to do the right thing.
 *
 * Last, if _start is already at 0x01000, then there's nothing special
 * to do (in other words, in a degenerate case of the first case above,
 * do nothing).
 *
 * Let's do it.
 * 
 * 
 */

	putc_trace('L')
	
#if defined(CONFIG_MAC)
	is_not_mac(1f)
	lea	%pc@(Lconsole_video_virtual),%a1
	lea	%pc@(SYMBOL_NAME(mac_videobase)),%a3
	movel	%a1@,%a3@
1:
#endif
	
#if defined(CONFIG_AMIGA)
	is_not_amiga(1f)
	/* fixup the Amiga custom register location before printing */
	lea	%pc@(Lcustom),%a0
	movel	#0x80000000,%a0@
1:	
#endif

#if defined(CONFIG_ATARI)
	is_not_atari(1f)
	/* fixup the Atari iobase register location before printing */
	lea	%pc@(Liobase),%a0
	movel	#0xff000000,%a0@
1:	
#endif
	
#if defined(CONFIG_HP300)
	is_not_hp300(1f)
	/*
	 * Fix up the custom register to point to the new location of the LEDs.
	 */
	lea	%pc@(Lcustom),%a1
	movel	#0xf0000000,%a1@
1:	
#endif
	
	/*
	 * Test for the simplest case:
	 *    _start == 0x01000 
	 *       %d5 == 0x00000
	 */
	lea	mmu_engage_done:w,%a0
	tstl	%d5
	jbeq	mmu_engage_core

	/*
	 * Prepare a transparent translation register
	 * for the region the kernel is in.
	 */
	movel	%d5,%d0
	andl	#0xff000000,%d0

#if defined(CONFIG_M68040) || defined(CONFIG_M68060)
	is_not_040_or_060(1f)
	lea	mmu_engage_040_disable_itt0,%a0
	
	orw	#TTR_ENABLE+TTR_KERNELMODE+_PAGE_NOCACHE_S,%d0
	.chip	68040
	movec	%d0,%itt0
	.chip	68k
	jbra	2f
1:
#endif
#if defined(CONFIG_M68020) || defined(CONFIG_M68030)
	lea	mmu_engage_030_disable_tt0,%a0
	
	orw	#TTR_ENABLE+TTR_CI+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d0
	lea	%pc@(Lmmu),%a3
	movel	%d0,%a3@
	.chip	68030
	pmove	%a3@,%tt0
	.chip	68k
#endif

	/*
	 * Test for being able to use just a
	 * transparent translation register:
	 *    _start >= 0x0100.1000
	 *       %d5 >= 0x0100.0000
	 */
2:
	movel	%d5,%d0
	andil	#0xff000000,%d0
	jbne	mmu_engage_core

	/*
	 * I hate this case: 
	 *   %d5 > 0, and
	 *   %d5 < 0x0100.0000
	 * Here's where we have to create a temporary mapping
	 * at 0x8000.0000 and do all the right stuff magic.
	 * This bites.  -- rst
	 */

#define TMP_MAP		0x80000000
#define TMP_MAP_OFFS	(TMP_MAP>>(ROOT_INDEX_SHIFT-2))

	/*
	 * Build a really small Ptr table at %d5
	 */
	movel	%d5,%a4
	jbsr	mmu_clear_pointer_table
	
	movel	%d5,%d0
	addl	#0x100,%d0
	orw	#_PAGE_TABLE+_PAGE_ACCESSED,%d0
	movel	%d0,%a4@
	
	/*
	 * Build a really small Page table at %d5 + 0x100
	 * (Maps the first 16K of the kernel @ 0x8000.0000)
	 */
	movel	%d5,%a3
	addaw	#0x100,%a3
	jbsr	mmu_clear_page_table
	
	movel	#PAGESIZE,%d1
	movel	%d5,%d0
	orw	#_PAGE_PRESENT+_PAGE_ACCESSED,%d0
	movel	%d0,%a3@+
	addl	%d1,%d0
	movel	%d0,%a3@+
	addl	%d1,%d0
	movel	%d0,%a3@+
	addl	%d1,%d0
	movel	%d0,%a3@

	/*
	 * Alter the Root table to use our really small entries
	 */
	lea	%a5@(TMP_MAP_OFFS),%a0
	movel	%a0@,%d2		/* save entry */
	movel	%d5,%d0
	orw	#_PAGE_TABLE+_PAGE_ACCESSED,%d0
	movel	%d0,%a0@		/* insert temp. entry */

#if defined(CONFIG_M68040) || defined(CONFIG_M68060)
	is_not_040_or_060(1f)
	lea	mmu_engage_040_disable_8000,%a0
	addal	#TMP_MAP,%a0
	jbra	mmu_engage_core
1:
#endif
#if defined(CONFIG_M68020) || defined(CONFIG_M68030)
	lea	mmu_engage_030_disable_8000,%a0
	addal	#TMP_MAP,%a0
#endif
	
mmu_engage_core:
	
#if defined(CONFIG_M68040) || defined(CONFIG_M68060)
	is_not_040_or_060(2f)

mmu_engage_040:
	.chip	68040
	nop
	cinva	%bc
	nop
	pflusha
	nop
	movec	%a5,%srp
	movec	%a5,%urp
	movel	#TC_ENABLE+TC_PAGE4K,%d0
	movec	%d0,%tc		/* enable the MMU */
	lea	SYMBOL_NAME(kernel_pg_dir),%a5
	jmp	%a0@		/* Go to clean up code */

mmu_engage_040_disable_itt0:
	moveq	#0,%d0
	movec	%d0,%itt0
	jmp	mmu_engage_done:w

mmu_engage_040_disable_8000:
	/*
	 * This code is running at 0x8000.0000+ right now
	 */
	moveq	#0,%d0
	movec	%d0,%itt0
	jmp	1f:w	/* Jump down into logical space into the kernel! */
1:
	/* Now we're back on the ground! */
	movel	%d2,%a5@(TMP_MAP_OFFS) /* Restore the old 0x8000.0000 mapping */
	nop
	pflusha
	nop
	jmp	mmu_engage_done:w
	.chip	68k

2:
#endif

#if defined(CONFIG_M68020) || defined(CONFIG_M68030)
mmu_engage_030:
	.chip	68030
	lea	%pc@(Lmmu),%a3
	movel	#0x80000002,%a3@
	movel	%a5,%a3@(4)
	movel	#0x0808,%d1
	movec	%d1,%cacr
	pmove	%a3@,%srp
	pmove	%a3@,%crp
	pflusha
	/*
	 * enable,super root enable,4096 byte pages,7 bit root index,
	 * 7 bit pointer index, 6 bit page table index.
	 */
	movel	#0x82c07760,%a3@
	pmove	%a3@,%tc	/* enable the MMU */
	lea	SYMBOL_NAME(kernel_pg_dir),%a5
	jmp	%a0@		/* Go to the appropriate clean up code */

mmu_engage_030_disable_tt0:
	clrl	%a3@
	pmove	%a3@,%tt0
	jmp	mmu_engage_done:w
	
mmu_engage_030_disable_8000:
	clrl	%a3@
	pmove	%a3@,%tt0
	jmp	1f:w	/* Jump down into logical space into the kernel! */
1:
	/* Now we're back on the ground! */
	movel	%d2,%a5@(TMP_MAP_OFFS)	/* Restore the old 0x8000.0000 mapping */
	pflusha
	jmp	mmu_engage_done:w
	.chip	68k
#endif
	
mmu_engage_done:

#if defined(CONFIG_HP300)
	is_not_hp300(1f)
	/*
	 * Energise the FPU and caches.
	 */
	movel	#0x60, 0xf05f400c
1:	
#endif
	movew	#PAGESIZE,%sp
	
/*
 * Fixup the addresses for the kernel pointer table and availmem.
 * Convert them from physical addresses to virtual addresses.
 */

	putc_trace('M')
	leds(0x10)

	/* d5 contains physaddr of kernel start
	 */
	lea	SYMBOL_NAME(kpt),%a0
	subl	%d5,%a0@

	/* do the same conversion on the first available memory
	 * address (in a6).
	 */
	lea	SYMBOL_NAME(availmem),%a0
	subl	%d5,%a6
	movel	%a6,%a0@
	
/*
 * Enable caches
 */

#if defined(CONFIG_M68040) || defined(CONFIG_M68060)
	is_not_040_or_060(Lcache_not_680460)

Lcache680460:
	.chip	68040
	nop
	cpusha	%bc
	nop
	
	is_060(Lcache68060)

	movel	#CC6_ENABLE_D+CC6_ENABLE_I,%d0
	/* MMU stuff works in copyback mode now, so enable the cache */
	movec	%d0,%cacr
	jra	Lcache_done

Lcache68060:
	movel	#CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
	/* MMU stuff works in copyback mode now, so enable the cache */
	movec	%d0,%cacr
	/* enable superscalar dispatch in PCR */
	moveq	#1,%d0
	.chip	68060
	movec	%d0,%pcr

	jbra	Lcache_done
Lcache_not_680460:
#endif
#if defined(CONFIG_M68020) || defined(CONFIG_M68030)
Lcache68030:
	.chip	68030
	movel	#CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
	movec	%d0,%cacr

	jra	Lcache_done
#endif
	.chip	68k
Lcache_done:

	putc_trace('P')

#if defined(MMU_PRINT_PAGE_USAGE)
	/*
	 * Print out the number of pages used by MMU above the kernel
	 */
	puts("MMU #")
	lea	%pc@(SYMBOL_NAME(_end)),%a0
	addw	#PAGESIZE-1,%a0
	movel	%a0,%d0
	andl	#-PAGESIZE,%d0
	movel	%a6,%d1
	subl	%d0,%d1		/* d1 :	= d1 - d0 */
	putn(%d1)
	putr()

	puts("Page #")
	putn(%pc@(Lmmu_num_page_tables))
	putr()

	puts("Ptr #")
	putn(%pc@(Lmmu_num_pointer_tables))
	putr()

	puts("Total #")
	movel	%pc@(Lmmu_num_page_tables),%d0
	addl	%pc@(Lmmu_num_pointer_tables),%d0
	putn(%d0)
	putr()

	puts("Halting.")	
1:
	jbra	1b
#endif /* MMU_PRINT_PAGE_USAGE */
	
/*
 * Setup initial stack pointer
 */
	lea	SYMBOL_NAME(init_task_union),%a2
	lea	0x2000(%a2),%sp

/* jump to the kernel start */
	putr()
	leds(0x55)

#if defined(DEBUG)
	puts("     kpt:")
	lea	%pc@(SYMBOL_NAME(kpt)),%a0
	movel	%a0,%d7		/* get start addr. */
	jbsr	Lserial_putnum
	putr()

	puts("    *kpt:")
	lea	%pc@(SYMBOL_NAME(kpt)),%a0
	movel	%a0@,%d7	/* get start addr. */
	jbsr	Lserial_putnum
	putr()
#endif

#if 0
	movel	#0xFFFF,%d1
2:
	movel	#0xFFFFFFFF,%d0
1:
	dbra	%d0,1b
	dbra	%d1,2b
#endif

	subl	%a6,%a6		/* clear a6 for gdb */
	jbsr	SYMBOL_NAME(start_kernel)

/*
 * Find a tag record in the bootinfo structure
 * The bootinfo structure is located right after the kernel bss
 * Returns: d0: size (-1 if not found)
 *          a0: data pointer (end-of-records if not found)
 */
Lget_bi_record:
	lea	%pc@(SYMBOL_NAME(_end)),%a0
1:	tstw	%a0@(BIR_tag)
	jeq	3f
	cmpw	%a0@(BIR_tag),%d0
	jeq	2f
	addw	%a0@(BIR_size),%a0
	jra	1b
2:	moveq	#0,%d0
	movew	%a0@(BIR_size),%d0
	lea	%a0@(BIR_data),%a0
	rts
3:	moveq	#-1,%d0
	lea	%a0@(BIR_size),%a0
	rts

/*
 *	MMU Initialization Begins Here
 *
 *	The structure of the MMU tables on the 68k machines
 *	is thus:
 *	Root Table
 *		Logical addresses are translated through
 *	a hierarchical translation mechanism where the high-order
 *	seven bits of the logical address (LA) are used as an
 *	index into the "root table."  Each entry in the root
 *	table has a bit which specifies if it's a valid pointer to a
 *	pointer table.  Each entry defines a 32KMeg range of memory.
 *	If an entry is invalid then that logical range of 32M is
 *	invalid and references to that range of memory (when the MMU
 *	is enabled) will fault.  If the entry is valid, then it does
 *	one of two things.  On 040/060 class machines, it points to
 *	a pointer table which then describes more finely the memory
 *	within that 32M range.  On 020/030 class machines, a technique
 *	called "early terminating descriptors" are used.  This technique
 *	allows an entire 32Meg to be described by a single entry in the
 *	root table.  Thus, this entry in the root table, contains the
 *	physical address of the memory or I/O at the logical address
 *	which the entry represents and it also contains the necessary
 *	cache bits for this region.
 *
 *	Pointer Tables
 *		Per the Root Table, there will be one or more
 *	pointer tables.  Each pointer table defines a 32M range.
 *	Not all of the 32M range need be defined.  Again, the next
 *	seven bits of the logical address are used an index into
 *	the pointer table to point to page tables (if the pointer
 *	is valid).  There will undoubtedly be more than one
 *	pointer table for the kernel because each pointer table
 *	defines a range of only 32M.  Valid pointer table entries
 *	point to page tables, or are early terminating entries
 *	themselves.
 *
 *	Page Tables
 *		Per the Pointer Tables, each page table entry points
 *	to the physical page in memory that supports the logical
 *	address that translates to the particular index.
 *
 *	In short, the Logical Address gets translated as follows:
 *		bits 31..26 - index into the Root Table
 *		bits 25..18 - index into the Pointer Table
 *		bits 17..12 - index into the Page Table
 *		bits 11..0  - offset into a particular 4K page
 *	
 *	The algorithms which follows do one thing: they abstract
 *	the MMU hardware.  For example, there are three kinds of
 *	cache settings that are relevant.  Either, memory is
 *	being mapped in which case it is either Kernel Code (or
 *	the RamDisk) or it is MMU data.  On the 030, the MMU data
 *	option also describes the kernel.  Or, I/O is being mapped
 *	in which case it has its own kind of cache bits.  There
 *	are constants which abstract these notions from the code that
 *	actually makes the call to map some range of memory.
 *	
 *	
 *	
 */

#if defined(MMU_PRINT)
/*
 *	mmu_print
 *	
 *	This algorithm will print out the current MMU mappings.
 *	
 *	Input:
 *		%a5 points to the root table.  Everything else is calculated
 *			from this.
 */

#define mmu_next_valid		0
#define mmu_start_logical	4
#define mmu_next_logical	8
#define mmu_start_physical	12
#define mmu_next_physical	16

#define MMU_PRINT_INVALID		-1
#define MMU_PRINT_VALID			1
#define MMU_PRINT_UNINITED		0

#define	putZc(z,n)		jbne 1f; putc(z); jbra 2f ; 1: putc(n); 2:

mmu_print:
	moveml	%a0-%a6/%d0-%d7,%sp@-

	lea	%pc@(Lmmu_print_data),%a0
	movel	#MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
	
	is_not_040_or_060(mmu_030_print)
	
mmu_040_print:
	putr()
	puts("MMU040")
	putr()
	putr()
	puts("rp:")
	movel	%a5,%d7
	jbsr	Lserial_putnum
	putr()
	puts("tc:")
	movel	%d5,%d7
	jbsr	Lserial_putnum
	putr()
	putr()
#if 0
	/*
	 * The following #if/#endif block is a tight algorithm for dumping the 040
	 * MMU Map in gory detail.  It really isn't that practical unless the
	 * MMU Map algorithm appears to go awry and you need to debug it at the
	 * entry per entry level.
	 */
	movel	#ROOT_TABLE_SIZE-1,%d5
	movel	%a5@+,%d7		/* Burn an entry to skip the kernel mappings, they work */
1:	tstl	%d5
	jbeq	mmu_print_done
	subq	#1,%d5
	movel	%a5@+,%d7
	btst	#1,%d7
	jbeq	1b

2:	jbsr	Lserial_putnum
	andil	#0xFFFFFE00,%d7
	movel	%d7,%a4
	movel	#PTR_TABLE_SIZE,%d4
	putc(' ')
3:	tstl	%d4
	jbeq	11f
	subq	#1,%d4
	movel	%a4@+,%d7
	btst	#1,%d7
	jbeq	3b

4:	jbsr	Lserial_putnum
	andil	#0xFFFFFF00,%d7
	movel	%d7,%a3
	movel	#PAGE_TABLE_SIZE,%d3
5:	movel	#8,%d2
6:	tstl	%d3
	jbeq	31f
	subq	#1,%d3
	movel	%a3@+,%d6
	btst	#0,%d6
	jbeq	6b
7:	tstl	%d2
	jbeq	8f
	subq	#1,%d2
	putc(' ')
	jbra	91f
8:	putr()
	movel	#8+1+8+1+1,%d2
9:	putc(' ')
	dbra	%d2,9b
	movel	#7,%d2
91:	movel	%d6,%d7
	jbsr	Lserial_putnum
	jbra	6b

31:	putr()
	movel	#8+1,%d2
32:	putc(' ')
	dbra	%d2,32b
	jbra	3b

11:	putr()
	jbra	1b
#endif /* MMU 040 Dumping code that's gory and detailed */
			
	movel	%a5,%d0			/* a5 -> root table ptr */
	andil	#0xfffffe00,%d0		/* I forget why this is here ? */
	movel	%d0,%a0			/* a0 has the address of the root table ptr */
	movel	#0x00000000,%a4		/* logical address */
	moveql	#0,%d0
40:
	/* Increment the logical address and preserve in d5 */
	movel	%a4,%d5
	addil	#PAGESIZE<<13,%d5
	movel	%a0@+,%d6
	btst	#1,%d6
	jbne	41f
	jbsr	mmu_print_tuple_invalidate
	jbra	48f
41:	
	movel	#0,%d1
	andil	#0xfffffe00,%d6
	movel	%d6,%a1
42:
	movel	%a4,%d5
	addil	#PAGESIZE<<6,%d5
	movel	%a1@+,%d6
	btst	#1,%d6
	jbne	43f
	jbsr	mmu_print_tuple_invalidate
	jbra	47f
43:		
	movel	#0,%d2
	andil	#0xffffff00,%d6
	movel	%d6,%a2
44:	
	movel	%a4,%d5
	addil	#PAGESIZE,%d5
	movel	%a2@+,%d6
	btst	#0,%d6
	jbne	45f
	jbsr	mmu_print_tuple_invalidate
	jbra	46f
45:
	moveml	%d0-%d1,%sp@-
	movel	%a4,%d0
	movel	%d6,%d1
	andil	#0xfffff4e0,%d1
	lea	%pc@(mmu_040_print_flags),%a6
	jbsr	mmu_print_tuple
	moveml	%sp@+,%d0-%d1
46:
	movel	%d5,%a4
	addq	#1,%d2
	cmpib	#64,%d2
	jbne	44b
47:
	movel	%d5,%a4
	addq	#1,%d1
	cmpib	#128,%d1
	jbne	42b
48:
	movel	%d5,%a4			/* move to the next logical address */	
	addq	#1,%d0
	cmpib	#128,%d0
	jbne	40b

	.long	0x4e7a0007		/* movec dtt1,%d0 */
	movel	%d0,%d1
	andiw	#0x8000,%d1		/* is it valid ? */
	jbeq	49f			/* No, bail out */

	movel	%d0,%d1
	andil	#0xff000000,%d1		/* Get the address */
	putn(%d1)
	puts("==")
	putn(%d1)

	movel	%d0,%d6
	jbsr	mmu_040_print_flags_tt
	
49:
	jbra	mmu_print_done

mmu_040_print_flags:
	btstl	#10,%d6
	putZc(' ','G')	/* global bit */
	btstl	#7,%d6
	putZc(' ','S')	/* supervisor bit */
mmu_040_print_flags_tt:	
	btstl	#6,%d6
	jbne	3f
	putc('C')
	btstl	#5,%d6
	putZc('w','c')	/* write through or copy-back */
	jbra	4f
3:
	putc('N')
	btstl	#5,%d6
	putZc('s',' ')	/* serialized non-cacheable, or non-cacheable */
4:		
	rts
	
mmu_030_print_flags:
	btstl	#6,%d6
	putZc('C','I')	/* write through or copy-back */
	rts
	
mmu_030_print:	
	putr()
	puts("rp:")
	movel	%a5,%d7
	jbsr	Lserial_putnum
	putr()
	puts("tc:")
	movel	%d5,%d7
	jbsr	Lserial_putnum
	putr()
	putr()
	puts("MMU030")
	putr()
	movel	%a5,%d0
	andil	#0xfffffff0,%d0
	movel	%d0,%a0
	movel	#0x00000000,%a4		/* logical address */
	movel	#0,%d0
30:
	movel	%a4,%d5
	addil	#PAGESIZE<<13,%d5
	movel	%a0@+,%d6
	btst	#1,%d6			/* is it a ptr? */
	jbne	31f			/* yes */
	btst	#0,%d6			/* is it early terminating? */
	jbeq	1f			/* no */
	jbsr	mmu_030_print_helper
	jbra	38f
1:	
	jbsr	mmu_print_tuple_invalidate
	jbra	38f
31:	
	movel	#0,%d1
	andil	#0xfffffff0,%d6
	movel	%d6,%a1
32:
	movel	%a4,%d5
	addil	#PAGESIZE<<6,%d5
	movel	%a1@+,%d6
	btst	#1,%d6
	jbne	33f
	btst	#0,%d6
	jbeq	1f			/* no */
	jbsr	mmu_030_print_helper
	jbra	37f
1:	
	jbsr	mmu_print_tuple_invalidate
	jbra	37f
33:		
	movel	#0,%d2
	andil	#0xfffffff0,%d6
	movel	%d6,%a2
34:	
	movel	%a4,%d5
	addil	#PAGESIZE,%d5
	movel	%a2@+,%d6
	btst	#0,%d6
	jbne	35f
	jbsr	mmu_print_tuple_invalidate
	jbra	36f
35:
	jbsr	mmu_030_print_helper
36:
	movel	%d5,%a4
	addq	#1,%d2
	cmpib	#64,%d2
	jbne	34b
37:
	movel	%d5,%a4
	addq	#1,%d1
	cmpib	#128,%d1
	jbne	32b
38:
	movel	%d5,%a4			/* move to the next logical address */	
	addq	#1,%d0
	cmpib	#128,%d0
	jbne	30b

mmu_print_done:
	putr()
	putr()
	
	moveml	%sp@+,%a0-%a6/%d0-%d7
	rts

mmu_030_print_helper:
	moveml	%d0-%d1,%sp@-
	movel	%a4,%d0
	movel	%d6,%d1
	lea	%pc@(mmu_030_print_flags),%a6
	jbsr	mmu_print_tuple
	moveml	%sp@+,%d0-%d1
	rts
	
mmu_print_tuple_invalidate:
	moveml	%a0/%d7,%sp@-

	lea	%pc@(Lmmu_print_data),%a0
	tstl	%a0@(mmu_next_valid)
	jbmi	mmu_print_tuple_invalidate_exit
	
	movel	#MMU_PRINT_INVALID,%a0@(mmu_next_valid)

	movel	%a4,%d7
	jbsr	Lserial_putnum
	
	puts("##")
	putr()
	
mmu_print_tuple_invalidate_exit:
	moveml	%sp@+,%a0/%d7
	rts

mmu_print_tuple:
	moveml	%d0-%d7/%a0,%sp@-

	lea	%pc@(Lmmu_print_data),%a0
	
	tstl	%a0@(mmu_next_valid)
	jbmi	mmu_print_tuple_print
	jbeq	mmu_print_tuple_print
	jbpl	mmu_print_tuple_test

mmu_print_tuple_test:
	cmpl	%a0@(mmu_next_physical),%d1
	jbeq	mmu_print_tuple_increment
	
mmu_print_tuple_print:
	movel	%d0,%d7
	jbsr	Lserial_putnum
	
	puts("->")
	
	movel	%d1,%d7
	jbsr	Lserial_putnum

	movel	%d1,%d6
	jbsr	%a6@
	
mmu_print_tuple_record:
	movel	#MMU_PRINT_VALID,%a0@(mmu_next_valid)
	
	movel	%d1,%a0@(mmu_next_physical)

mmu_print_tuple_increment:
	movel	%d5,%d7
	subl	%a4,%d7
	addl	%d7,%a0@(mmu_next_physical)
	
mmu_print_tuple_exit:	
	moveml	%sp@+,%d0-%d7/%a0
	rts

mmu_print_machine_cpu_types:
	puts("machine: ")
	
	is_not_amiga(1f)
	puts("amiga")
	jbra	9f
1:	
	is_not_atari(2f)
	puts("atari")
	jbra	9f
2:	
	is_not_mac(3f)
	puts("macintrash")
	jbra	9f
3:	puts("unknown")
9:	putr()

	puts("cputype: 0")		
	is_not_060(1f)
	putc('6')
	jbra	9f
1:	
	is_not_040_or_060(2f)
	putc('4')
	jbra	9f
2:	putc('3')
9:	putc('0')
	putr()
		
	rts
#endif /* MMU_PRINT */

/*
 *	mmu_clear_root_table
 *
 *	%a5 = pointer to the root table
 *	
 *	This routine will clear out the kernel root table
 *
 *	The root table points to 128 pointer tables.  Because the
 *	root table describes 32 bits of logical memory, (and there
 *	are 7 bits of indexing in the root table) there is 25 bits
 *	of logical address space described by each entry in the
 *	root table.  2^25 is 32Meg, another way to look at that is
 *	4Gig / 128 = 32Meg.  Any entry which does not have bit 1 set
 *	is not a valid entry.  In that case, a reference into that
 *	memory range will cause a memory exception (bus error).
 *
 */
mmu_clear_root_table:
	movel	%d0,%sp@-
	
	moveq	#ROOT_TABLE_SIZE-1,%d0
1:	clrl	%a5@(%d0*4)
	dbra	%d0,1b

	movel	%sp@+,%d0
	rts

/*
 *	mmu_clear_pointer_table
 *
 *	%a4 = pointer to a pointer table
 *
 *	This routine will clear out a pointer table.
 *	It does NOT link the pointer table into the root table
 *	(that linkage is done by mapping memory!)
 */
mmu_clear_pointer_table:	
	movel	%d0,%sp@-
	
	moveq	#PTR_TABLE_SIZE-1,%d0
1:	clrl	%a4@(%d0*4)
	dbra	%d0,1b

	movel	%sp@+,%d0
	rts

/*
 *	mmu_clear_page_table
 *
 *	%a3 = pointer to a page table
 *
 *	This routine will clear out a page table.
 *	It does NOT link the page table into the pointer table
 *	(that linkage is done by mapping memory!)
 */
mmu_clear_page_table:	
	movel	%d0,%sp@-
	
	moveq	#PAGE_TABLE_SIZE-1,%d0
1:	clrl	%a3@(%d0*4)
	dbra	%d0,1b

	movel	%sp@+,%d0
	rts

/*
 *	mmu_map
 *
 *	%a6 = address of free memory above kernel (page aligned)
 *	%a5 = pointer to the root table
 *	%a4 = pointer to a pointer table
 *	%a1 = physical address of mapping
 *	%a0 = logical address to map
 *	%d1 = memory type
 *	%d0 = length of the mapping
 *
 *	This routine will map a range of memory using a pointer
 *	table and allocating the pages on the fly from the kernel.
 *	The pointer table does not have to be already linked into
 *	the root table, this routine will do that if necessary.
 *
 *	NOTE
 *	This routine will assert failure and use the Lserial_putc
 *	routines in the case of a run-time error.  For example,
 *	if the address to be mapped requires two pointer tables
 *	this routine will fail and the boot process will terminate.
 *	A higher level routine would have to be written to call
 *	this routine multiple times (with different parameters)
 *	if a single mapping might straddle multiple pointer tables.
 *
 *	NOTE-2
 *	This routine will use early terminating descriptors
 *	where possible for the 68020+68851 and 68030 type
 *	processors.
 */
mmu_map:
	moveml	%d0-%d7/%a0-%a5,%sp@-

	/* Calculate the offset in the root table 
	 */
	movel	MAP_LOG,%d5
	andil	#0xfe000000,%d5
	roll	#7,%d5

	/* Calculate the offset in the pointer table 
	 */
	movel	MAP_LOG,%d4
	andil	#0x01fc0000,%d4
	lsrl	#2,%d4
	swap	%d4
	
	/* Calculate the offset in the page table (used on 040's + 060's)
	 */
	movel	MAP_LOG,%d3
	andil	#0x0003f000,%d3
	lsll	#4,%d3
	swap	%d3

	/*
	 *	The code that follows implements the following rules
	 *	with respect to the pointer table for this memory mapping
	 *	1) If the memory to be mapped lies within an already
	 *	   mapped region, there will be a pointer table listed
	 *	   in the root table.  This pointer table must be used.
	 *	2) If the caller does not supply a pointer table, a table
	 *	   will be allocated from above the kernel.
	 *	3) Else, the caller must have passed the address to memory
	 *	   that will be used as the pointer table for this mapping.
	 */
mmu_map_check_root_entry:
	/* Is another pointer table already mapped into this root entry?
	 */
	movel	%a5@(%d5*4),%d2
	jbeq	mmu_map_check_make_new_pointer_table

	/* If there is an entry already, we must use it
	 * to preserve existing MMU mapping data!
	 */
	andil	#_TABLE_MASK,%d2
	movel	%d2,%a4
	jbra	3f
	
mmu_map_check_make_new_pointer_table:	
1:
	/* Should we get a pointer table from memory on behalf of the caller?
	 */
	tstl	%a4
	jbne	2f

	jbsr	mmu_get_pointer_table

2:
	/* Put the pointer table into the root table
	 */	
	movel	%a4,%d2
	orw	#_PAGE_TABLE+_PAGE_ACCESSED,%d2
	movel	%d2,%a5@(%d5*4)

3:
#if defined(CONFIG_M68020) || defined(CONFIG_M68030)
	/* Split up here, 030's have different logic than 040's
	 */
	
	is_not_040_or_060(mmu_map_030)
	
#endif /* CONFIG_M68020 || CONFIG_M68030 */

/*
 *	MMU 040 & 060 Support
 *
 *	The MMU usage for the 040 and 060 is different enough from
 *	the 030 and 68851 that there is separate code.  This comment
 *	block describes the data structures and algorithms built by
 *	this code.
 *	
 *	The 040 does not support early terminating descriptors, as
 *	the 030 does.  Therefore, a third level of table is needed
 *	for the 040, and that would be the page table.  In Linux,
 *	page tables are allocated directly from the memory above the
 *	kernel.  Register A6 points to the memory above kernel and
 *	it is from that pool that page tables are allocated.
 *	
 *	For each page table that is allocated from above the kernel,
 *	that page table's address has to be put into the pointer table.
 *	Then, each page table has to be fully prepared.  Page tables,
 *	by the way, describe a full 256K of memory.  That coincides with
 *	the fact that a single entry in the pointer table describes
 *	a 256K of memory because a pointer table entry points to a
 *	complete page table.  There are 64 entries in the page table,
 *	and each entry in the page table points to a physical page of
 *	memory.  Each page is 4K.
 *	
 *	Also, there is a label "kpt" which holds the pointer to the
 *	page table that describes the kernel.  This is only true on
 *	the 040 and 060 cpu's.  This algorithm, because it's general
 *	and allows the mapping of arbitrary regions of memory, assumes
 *	that the first memory mapping is the one which maps the kernel.
 *	So it's that page table that gets stored at kpt.
 *	
 *	Also, it is an error to attempt to map two regions that
 *	fall within the same 256K range.  For that to work, this routine
 *	would need to be modified.
 *	
 *	
 *	Last:
 *	This body of code is present even on 030 systems as this logic
 *	is used when a block on an 030 machine is not large enough
 *	to use an entire early terminating page descriptor.  (This
 *	can happen on the Macintosh when the video begins life at
 *	physical address 0.)
 */
mmu_map_040:
	/* Enhance the physical address to make a valid page descriptor
	 */
	movel	MAP_PHYS,%d2
	orw	#_PAGE_PRESENT,%d2
	orw	MAP_CACHE,%d2
	movel	%d2,MAP_PHYS

	/* Convert address range length into # of pages
	 */
	movel	#PAGESHIFT,%d2
	lsrl	%d2,MAP_LENGTH

mmu_040_loop:
	/* See if there is an existing page table pointer to use
	 */
	movel	%a4@(%d4*4),%d2
	andil	#_TABLE_MASK,%d2
	movel	%d2,%a3
	tstl	%a3
	jbne	mmu_fill_040_pagetable

	jbsr	mmu_get_page_table

	/* Now, begin assigning physical pages into the page table
	 */
mmu_fill_040_pagetable:
	movel	MAP_PHYS,%a3@(%d3*4)

	/* Decrement page count
	 */
	subq	#1,MAP_LENGTH
	jbeq	mmu_map_done

	/* Increase mapping addresses
	 */
	addl	#PAGESIZE,MAP_PHYS
	addl	#PAGESIZE,MAP_LOG

	/* Have we exhausted this page table?
	 */
	addq	#1,%d3
	cmpil	#PAGE_TABLE_SIZE,%d3
	jbne	mmu_fill_040_pagetable

	/* Have we exhausted this pointer table?
	 */
	clrl	%d3
	addq	#1,%d4
	cmpil	#PTR_TABLE_SIZE,%d4
	jbne	mmu_040_loop

	/* We've exhausted this pointer table... get a new one
	 */
	jbsr	mmu_get_pointer_table
	clrl	%d4	/* %d4 is ptr table index */
	
	jbra	mmu_040_loop

/*
 * mmu_map_revert
 *
 * Control gets here if mmu_map_040_tt is called and the conditions
 * are not correct to employ tt translations.
 */
mmu_map_revert:
	puts("MMU Note- attempting to use mmu_map_tt when not appropriate")
	putr()
	jbra	mmu_map

/*
 * mmu_map_tt
 * 
 * This is a specific function which works on all 680x0 machines.
 * On 040 & 060 it will attempt to use Transparent Translation registers (tt1).
 * On 020 & 030 it will call the standard mmu_map which will use early
 * terminating descriptors.
 */
mmu_map_tt:
	is_not_040_or_060(mmu_map)

#if defined(CONFIG_M68040) || defined(CONFIG_M68060)
mmu_map_040_tt:
	moveml	%d0-%d7/%a0-%a4,%sp@-
#if defined(DEBUG)
	/*
	 * Test for Transparent Translation working conditions
	 */
	cmpl	MAP_PHYS,MAP_LOG
	jbne	mmu_map_revert

	movel	MAP_PHYS,%d2
	andil	#0x00ffffff,%d2
	jbne	mmu_map_revert

	/* Length must be a power of two
	 */
	movel	#0x01000000,%d2
3:	
	cmpl	%d2,MAP_LENGTH
	jbeq	5f
	lsll	#1,%d2
	jbne	3b		/* Will terminate when %d2 == 0 */
	
	jbra	mmu_map_revert
5:	
#endif /* DEBUG */

	subil	#0x01000000,MAP_LENGTH
	lsrl	#8,MAP_LENGTH
	movel	MAP_PHYS,%d2
	orl	MAP_LENGTH,%d2
	oriw	#0xa000,%d2	/* Enable | Supervisor Only */
	orb	MAP_CACHE,%d2

	.chip	68040
	movec	%d2,%itt1
	movec	%d2,%dtt1
	.chip	68k

	moveml	%sp@+,%d0-%d7/%a0-%a4
	rts
#endif /* CONFIG_M68040 || CONFIG_M68060) */

#if defined(CONFIG_M68020) || defined(CONFIG_M68030)		
mmu_map_030:
	/*
	 * If not a multiple of 256K, use page descriptors.
	 */
	movel	MAP_LENGTH,%d2
	andl	#(PAGE_TABLE_SIZE*PAGESIZE)-1,%d2
	jbne	mmu_map_040

	/* Enhance the MMU mode to make an early terminating descriptor
	 */
	movel	MAP_PHYS,%d2
	orw	#_PAGE_PRESENT,%d2
	orw	MAP_CACHE,%d2
	movel	%d2,MAP_PHYS

	/* Convert # of pages into # of 256K entries
	 */
	movel	#PTR_INDEX_SHIFT,%d2
	lsrl	%d2,MAP_LENGTH

	cmpil	#PTR_TABLE_SIZE,MAP_LENGTH
	jbcc	mmu_030_root_loop
		
	/* Since %a5 and %a4 point to a valid root table and
	 * a valid pointer table, all we need to do is map.
	 */
mmu_030_ptr_loop:
	/* Map logical to physical
	 */
	movel	MAP_PHYS,%a4@(%d4*4)

	/* Decrement number of 256K chunks to map
	 */
	subq	#1,MAP_LENGTH
	jbeq	mmu_map_done

	/* Increment mapping addresses
	 */
	addl	#PAGE_TABLE_SIZE*PAGESIZE,MAP_LOG
	addl	#PAGE_TABLE_SIZE*PAGESIZE,MAP_PHYS

	/* Increment pointer table offset
	 */
	addq	#1,%d4
	cmpl	#PTR_TABLE_SIZE,%d4
	jbne	mmu_030_ptr_loop
	
	/* We've exhausted this pointer table... get a new one
	 */
	jbsr	mmu_get_pointer_table
	clrl	%d4	/* ptr table index */
	
	jbra	mmu_030_ptr_loop

mmu_030_root_loop:
	/* Early terminating descriptor 32M entry
	 */
	movel	MAP_PHYS,%a5@(%d5*4)

	/* Decrement number of 32M chunks to map
	 */
	subl	#PTR_TABLE_SIZE,MAP_LENGTH
	jbeq	mmu_map_done
	cmpl	#PTR_TABLE_SIZE,MAP_LENGTH
	jbcs	mmu_030_ptr_loop

	/* Increment mapping addresses
	 */
	addl	#PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE,MAP_LOG
	addl	#PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE,MAP_PHYS
	
	/* Increment root table offset
	 */
	addq	#1,%d5
	cmpl	#ROOT_TABLE_SIZE,%d5
	jbne	mmu_030_root_loop
#if defined(DEBUG)
	/* We're trying to map past 0xFFFF.FFFF
	 */
	moveq	#7,%d7
	jbra	mmu_err
#endif /* DEBUG */
#endif /* CONFIG_M68020 || CONFIG_M68030 */
	
mmu_map_done:
	moveml	%sp@+,%d0-%d7/%a0-%a5
	rts

#if defined(DEBUG)
mmu_err:
	movel	%d7,%d3
	putr()
	puts("Error: ")

	movel	%d3,%d7
	jbsr	Lserial_putnum

	puts("Logical Address #0x")
	putn(MAP_LOG)
	putr()

	puts("Physical Address #0x")
	putn(MAP_PHYS)
	putr()

	puts("Length #0x")
	putn(MAP_LENGTH)
	putr()

	puts("Cache bits #0x")
	putn(MAP_CACHE)
	putr()

#if defined(MMU_PRINT)
	jbsr	mmu_print
#endif
	
1:
	jbra	1b
#endif	/* DEBUG */

/*
 *	mmu_get_page_table
 *	
 *	This routine will get page table from above the kernel.
 *	What's most interesting about this routine is that it is
 *	capable of getting up to 16 page tables out of a page of
 *	memory.  While this is the same algorithm used by the kernel
 *	later on, it is also what is used down here.
 */
mmu_get_page_table:
	moveml	%a0-%a2/%d0-%d2,%sp@-

	/* Keep track of the number of pointer tables we use
	 */
	lea	%pc@(Lmmu_num_page_tables),%a2
	addql	#1,%a2@
	
	/* See if there is a page table in our cache of page tables
	 */
	lea	%pc@(SYMBOL_NAME(Lmmu_cached_page_tables)),%a2
	movel	%a2@,%d2
	jbne	1f

	/* The first time through this algorithm, we've got to get a page
	 */
	movel	%a6,%d2
	addw	#PAGESIZE,%a6	/* allocate page for 16 page tables */

1:	/* There is an unused page table in our cache... use it
	 */
	movel	%d2,%a3
	addil	#PAGE_TABLE_SIZE*4,%d2
	movel	%d2,%a2@

	/* Basically this is (PAGESIZE-1)-(PAGE_TABLE_SIZE*4-1), but
	 * the two -1 can be eliminated.
	 * The condition is true if the current page table is at the
	 * start of the next page. */
	andil	#PAGESIZE-PAGE_TABLE_SIZE*4,%d2
	jbne	2f

	/* Get the page table from above the kernel memory
	 */	
	movel	%a6,%a2@
	addw	#PAGESIZE,%a6	/* allocate page for 16 page tables */
	
2:
	lea	%pc@(SYMBOL_NAME(kpt)),%a2
	tstl	%a2@
	jbne	3f
	movel	%a3,%a2@
	
3:	jbsr	mmu_clear_page_table

	/* Log this page table (%a3) in the pointer table (%a4)
	 */
	movel	%a3,%d2
	orw	#_PAGE_TABLE+_PAGE_ACCESSED,%d2
	movel	%d2,%a4@(%d4*4)
	
	moveml	%sp@+,%a0-%a2/%d0-%d2
	rts
	
/*
 *	mmu_get_pointer_table
 *	
 *	This routine will get page table from above the kernel.
 *	What's most interesting about this routine is that it is
 *	capable of getting up to 8 page tables out of a page of
 *	memory.  While this is the same algorithm used by the kernel
 *	later on, it is also what is used down here.
 */
mmu_get_pointer_table:
	moveml	%a0-%a2/%d0-%d2,%sp@-

	/* Keep track of the number of pointer tables we use
	 */
	lea	%pc@(Lmmu_num_pointer_tables),%a2
	addql	#1,%a2@
	
	/* See if there is a pointer table in our cache of pointer tables
	 */
	lea	%pc@(Lmmu_cached_pointer_tables),%a2
	movel	%a2@,%d2
	jbne	1f

	/* The first time through this algorithm, we've got to get a page
	 */
	movel	%a6,%d2
	addw	#PAGESIZE,%a6	/* allocate page for 8 ptr tables */

1:	/* There is an unused pointer table in our cache... use it
	 */
	movel	%d2,%a4
	addil	#PTR_TABLE_SIZE*4,%d2
	movel	%d2,%a2@

	/* Did we just hand out the last ptr table in the cache page?
	 */
	andil	#PAGESIZE-PTR_TABLE_SIZE*4,%d2
	jbne	2f

	/* Get a new cache-of-ptr-tables page from above the kernel memory
	 */	
	movel	%a6,%a2@
	addw	#PAGESIZE,%a6	/* allocate page for 8 ptr tables */
2:
	jbsr	mmu_clear_pointer_table

	/* Log this pointer table (%a4) in the root table (%a5)
	 */
	movel	%a4,%d2
	orw	#_PAGE_TABLE+_PAGE_ACCESSED,%d2
	movel	%d2,%a5@(%d5*4)
	
	moveml	%sp@+,%a0-%a2/%d0-%d2
	rts

/*
 * Debug output support
 * Atarians have a choice between the parallel port, the serial port
 * from the MFP or a serial port of the SCC
 */

#if defined(CONFIG_MAC)

scc_initable_mac:
	.byte	9,12		/* Reset */
	.byte	4,0x44		/* x16, 1 stopbit, no parity */
	.byte	3,0xc0		/* receiver: 8 bpc */
	.byte	5,0xe2		/* transmitter: 8 bpc, assert dtr/rts */
	.byte	9,0		/* no interrupts */
	.byte	10,0		/* NRZ */
	.byte	11,0x50		/* use baud rate generator */
	.byte	12,10,13,0	/* 9600 baud */
	.byte	14,2,14,3	/* use master clock for BRG, enable */
	.byte	3,0xc1		/* enable receiver */
	.byte	5,0xea		/* enable transmitter */
	.byte	-1
	.even
#endif

#if defined(CONFIG_ATARI)
/* #define USE_PRINTER */
/* #define USE_SCC_B */
/* #define USE_SCC_A */
#define USE_MFP

#if defined(USE_SCC_A) || defined(USE_SCC_B)
#define USE_SCC
/* Initialisation table for SCC */
scc_initable:
	.byte	9,12		/* Reset */
	.byte	4,0x44		/* x16, 1 stopbit, no parity */
	.byte	3,0xc0		/* receiver: 8 bpc */
	.byte	5,0xe2		/* transmitter: 8 bpc, assert dtr/rts */
	.byte	9,0		/* no interrupts */
	.byte	10,0		/* NRZ */
	.byte	11,0x50		/* use baud rate generator */
	.byte	12,24,13,0	/* 9600 baud */
	.byte	14,2,14,3	/* use master clock for BRG, enable */
	.byte	3,0xc1		/* enable receiver */
	.byte	5,0xea		/* enable transmitter */
	.byte	-1
	.even
#endif

#if defined(USE_PRINTER)

LPSG_SELECT	= 0xff8800
LPSG_READ	= 0xff8800
LPSG_WRITE	= 0xff8802
LPSG_IO_A	= 14
LPSG_IO_B	= 15
LPSG_CONTROL	= 7
LSTMFP_GPIP	= 0xfffa01
LSTMFP_DDR	= 0xfffa05
LSTMFP_IERB	= 0xfffa09

#elif defined(USE_SCC_B)
 
LSCC_CTRL	= 0xff8c85
LSCC_DATA	= 0xff8c87

#elif defined(USE_SCC_A)

LSCC_CTRL	= 0xff8c81
LSCC_DATA	= 0xff8c83

/* Initialisation table for SCC */
scc_initable:
	.byte	9,12		/* Reset */
	.byte	4,0x44		/* x16, 1 stopbit, no parity */
	.byte	3,0xc0		/* receiver: 8 bpc */
	.byte	5,0xe2		/* transmitter: 8 bpc, assert dtr/rts */
	.byte	9,0		/* no interrupts */
	.byte	10,0		/* NRZ */
	.byte	11,0x50		/* use baud rate generator */
	.byte	12,24,13,0	/* 9600 baud */
	.byte	14,2,14,3	/* use master clock for BRG, enable */
	.byte	3,0xc1		/* enable receiver */
	.byte	5,0xea		/* enable transmitter */
	.byte	-1
	.even

#elif defined(USE_MFP)

LMFP_UCR     = 0xfffa29
LMFP_TDCDR   = 0xfffa1d
LMFP_TDDR    = 0xfffa25
LMFP_TSR     = 0xfffa2d
LMFP_UDR     = 0xfffa2f

#endif
#endif

/*
 * Serial port output support.
 */
LSERPER      = 0xdff032
LSERDAT      = 0xdff030
LSERDATR     = 0xdff018
LNTSC_PERIOD = 371
LPAL_PERIOD  = 368
LNTSC_ECLOCK = 7159090
LSERIAL_CNTRL = 0xbfd000
LSERIAL_DTR   = 7

/*
 * Initialize serial port hardware for 9600/8/1
 * a0 thrashed
 * Atari d0 trashed (a1 in case of SCC)
 */
	.even
Lserial_init:
#ifdef CONFIG_AMIGA
        cmpil   #MACH_AMIGA,%d4
        jne     1f
        bclr    #LSERIAL_DTR,LSERIAL_CNTRL
        movew   #BI_AMIGA_SERPER,%d0
        jbsr    Lget_bi_record
        movew   %a0@,LSERPER
        jra     9f
1:
#endif
#if defined(CONFIG_ATARI)
	is_not_atari(4f)
	movel	%pc@(Liobase),%a1
#if defined(USE_PRINTER)
	bclr	#0,%a1@(LSTMFP_IERB)
	bclr	#0,%a1@(LSTMFP_DDR)
	moveb	#LPSG_CONTROL,%a1@(LPSG_SELECT)
	moveb	#0xff,%a1@(LPSG_WRITE)
	moveb	#LPSG_IO_B,%a1@(LPSG_SELECT)
	clrb	%a1@(LPSG_WRITE)
	moveb	#LPSG_IO_A,%a1@(LPSG_SELECT)
	moveb	%a1@(LPSG_READ),%d0
	bset	#5,%d0
	moveb	%d0,%a1@(LPSG_WRITE)
#elif defined(USE_SCC)
	lea	%a1@(LSCC_CTRL),%a0
	lea	%pc@(scc_initable:w),%a1
2:	moveb	%a1@+,%d0
	jmi	3f
	moveb	%d0,%a0@
	moveb	%a1@+,%a0@
	jra	2b
3:	clrb	%a0@
#elif defined(USE_MFP)
	bclr	#1,%a1@(LMFP_TSR)
	moveb   #0x88,%a1@(LMFP_UCR)
	andb	#0x70,%a1@(LMFP_TDCDR)
	moveb   #2,%a1@(LMFP_TDDR)
	orb	#1,%a1@(LMFP_TDCDR)
	bset	#1,%a1@(LMFP_TSR)
#endif
4:	
#endif
#if defined(CONFIG_MAC)
	is_not_mac(8f)
#if defined(CONSOLE)
	jbsr	Lconsole_init
#endif
#if defined(MAC_SERIAL_DEBUG)
	/* channel A */
	lea	#50F04000,%a0
	lea	%pc@(scc_initable_mac:w),%a1
5:	moveb	%a1@+,%d0
	jmi	6f
	moveb	%d0,%a0@
	moveb	%a1@+,%a0@
	jra	5b
	/* channel B */
6:	lea	#50F04002,%a0
	lea	%pc@(scc_initable_mac:w),%a1
7:	moveb	%a1@+,%d0
	jmi	9f
	moveb	%d0,%a0@
	moveb	%a1@+,%a0@
	jra	7b
#endif
	jbra	9f
8:	
#endif
9:
	rts

/*
 * Output character in d7 on serial port.
 * d7 thrashed.
 */
Lserial_putc:
	cmpib	#'\n',%d7
	jbne	1f
	
	putc(13)	/* A little safe recursion is good for the soul */
	moveb	#'\n',%d7
1:	
	moveml	%a0/%a1,%sp@-

#if defined(CONFIG_AMIGA)
	is_not_amiga(2f)
	andw	#0x00ff,%d7
	oriw	#0x0100,%d7
	movel	%pc@(Lcustom),%a1
	movew	%d7,%a1@(LSERDAT)
1:	movew	%a1@(LSERDATR),%d7
	andw	#0x2000,%d7
	jeq	1b
	jra	Lserial_putc_done
2:
#endif

#if defined(CONFIG_MAC)
	is_not_mac(4f)
#if defined(CONSOLE)
	jbsr	Lconsole_putc
#endif /* CONSOLE */
#if defined(MAC_SERIAL_DEBUG)
	lea	0x50F04000,%a1
3:	btst	#2,%a1@(0)
	jeq	3b
	moveb	%d7,%a1@(4)
#endif
	jra	Lserial_putc_done
4:	
#endif

#if defined(CONFIG_ATARI)
	is_not_atari(4f)
	movel	%pc@(Liobase),%a1
#if defined(USE_PRINTER)
3:	btst	#0,%a1@(LSTMFP_GPIP)
	jne	3b
	moveb	#LPSG_IO_B,%a1@(LPSG_SELECT)
	moveb	%d7,%a1@(LPSG_WRITE)
	moveb	#LPSG_IO_A,%a1@(LPSG_SELECT)
	moveb	%a1@(LPSG_READ),%d7
	bclr	#5,%d7
	moveb	%d7,%a1@(LPSG_WRITE)
	nop
	nop
	bset	#5,%d7
	moveb	%d7,%a1@(LPSG_WRITE)
#elif defined(USE_SCC)
3:	btst	#2,%a1@(LSCC_CTRL)
	jeq	3b
	moveb	%d7,%a1@(LSCC_DATA)
#elif defined(USE_MFP)
3:	btst	#7,%a1@(LMFP_TSR)
	jeq	3b
	moveb	%d7,%a1@(LMFP_UDR)
#endif
4:
#endif

#if defined(CONFIG_MVME16x)
	is_not_mvme16x(2f)
	/*
	 * The VME 16x class has PROM support for serial output
	 * of some kind;  the TRAP table is still valid.
	 */
	moveml	%d0-%d7/%a2-%a6,%sp@-
	moveb	%d7,%sp@-
	.long	0x4e4f0020	/* TRAP 0x020 */
	moveml	%sp@+,%d0-%d7/%a2-%a6
	jbra	Lserial_putc_done
2:
#endif CONFIG_MVME162 | CONFIG_MVME167

#if defined(CONFIG_BVME6000)
	is_not_bvme6000(2f)
	/*
	 * The BVME6000 machine has a serial port ...
	 */
1:	btst	#2,BVME_SCC_CTRL_A
	jeq	1b
	moveb	%d7,BVME_SCC_DATA_A
	jbra	Lserial_putc_done
2:	
#endif

Lserial_putc_done:
	moveml	%sp@+,%a0/%a1
	rts

/*
 * Output string pointed to by a0 to serial port.
 * a0 trashed.
 */
Lserial_puts:
	movel	%d7,%sp@-
1:	moveb	%a0@+,%d7
	jeq	2f
	jbsr	Lserial_putc
	jra	1b
2:	movel	%sp@+,%d7
	rts

/*
 * Output number in d7 in hex notation on serial port.
 */

Lserial_putnum:
	moveml	%d0-%d2/%d7,%sp@-
	movel	%d7,%d1
	moveq	#4,%d0
	moveq	#7,%d2
L1:	roll	%d0,%d1
	moveb	%d1,%d7
	andb	#0x0f,%d7
	cmpb	#0x0a,%d7
	jcc	1f
	addb	#'0',%d7
	jra	2f
1:	addb	#'A'-10,%d7
2:	jbsr	Lserial_putc
	dbra	%d2,L1
	moveq	#32,%d7
	jbsr	Lserial_putc
	moveml	%sp@+,%d0-%d2/%d7
	rts

#if defined(CONFIG_MAC)
/*
 *	mac_serial_print
 *
 *	This routine takes its parameters on the stack.  It then
 *	turns around and calls the internal routine.  This routine
 *	is used until the Linux console driver initializes itself.
 *
 *	The calling parameters are:
 *		void mac_serial_print(const char *str);
 *
 *	This routine does NOT understand variable arguments only
 *	simple strings!
 */
ENTRY(mac_serial_print)
	movel	%a0,%sp@-
#if 1
	move	%sr,%sp@-
	ori	#0x0700,%sr
#endif
	movel	%sp@(10),%a0		/* fetch parameter */
	jbsr	Lserial_puts
#if 1
	move	%sp@+,%sr
#endif
	movel	%sp@+,%a0
	rts
#endif /* CONFIG_MAC */

#if defined(CONSOLE)
/*
 *	For continuity, see the data alignment
 *	to which this structure is tied.
 */
#define Lconsole_struct_cur_column	0
#define Lconsole_struct_cur_row		4
#define Lconsole_struct_num_columns	8
#define Lconsole_struct_num_rows	12
#define Lconsole_struct_left_edge	16
#define Lconsole_struct_penguin_putc	20

Lconsole_init:
	/*
 	 *	Some of the register usage that follows
	 *		a0 = pointer to boot_info
	 *		a1 = pointer to screen
	 *		a2 = pointer to Lconsole_globals
	 *		d3 = pixel width of screen
	 *		d4 = pixel height of screen
	 *		(d3,d4) ~= (x,y) of a point just below
	 *			and to the right of the screen
	 *			NOT on the screen!
	 *		d5 = number of bytes per scan line
	 *		d6 = number of bytes on the entire screen
	 */
	moveml	%a0-%a4/%d0-%d7,%sp@-
	
	lea	%pc@(SYMBOL_NAME(Lconsole_globals)),%a2
	lea	%pc@(SYMBOL_NAME(mac_videobase)),%a0
	movel	%a0@,%a1
	lea	%pc@(SYMBOL_NAME(mac_rowbytes)),%a0
	movel	%a0@,%d5
	lea	%pc@(SYMBOL_NAME(mac_dimensions)),%a0
	movel	%a0@,%d3
	movel	%d3,%d4
	swap	%d4
	andl	#0xffff,%d3	/* d3 = screen width in pixels */
	andl	#0xffff,%d4	/* d4 = screen height in pixels */

	movel	%d5,%d6
	mulul	%d4,%d6		/* scan line bytes x num scan lines */
	divul	#8,%d6		/* we'll clear 8 bytes at a time */
	subq	#1,%d6
	
console_clear_loop:
	movel	#0xffffffff,%a1@+	/* Mac_black */
	movel	#0xffffffff,%a1@+	/* Mac_black */
	dbra	%d6,console_clear_loop

	/* Calculate font size */

#if   defined(FONT_8x8)
	lea	%pc@(SYMBOL_NAME(font_vga_8x8)), %a0
#elif defined(FONT_8x16)
	lea	%pc@(SYMBOL_NAME(font_vga_8x16)),%a0
#elif defined(FONT_6x11)
	lea	%pc@(SYMBOL_NAME(font_vga_6x11)),%a0
#else	/*   (FONT_8x8) default */
	lea	%pc@(SYMBOL_NAME(font_vga_8x8)), %a0
#endif

	/*
	 *	At this point we make a shift in register usage
	 *	a1 = address of Lconsole_font pointer
	 */
	lea	%pc@(SYMBOL_NAME(Lconsole_font)),%a1
	movel	%a0,%a1@	/* store pointer to struct fbcon_font_desc in Lconsole_font */

	/*
	 *	Calculate global maxs
	 *	Note - we can use either an 
	 *	8 x 16 or 8 x 8 character font
	 *	6 x 11 also supported
	 */
		/* ASSERT: a0 = contents of Lconsole_font */
	movel	%d3,%d0			/* screen width in pixels */
	divul	%a0@(FBCON_FONT_DESC_width),%d0		/* d0 = max num chars per row */

	movel	%d4,%d1			 /* screen height in pixels */
	divul	%a0@(FBCON_FONT_DESC_height),%d1	 /* d1 = max num rows */

	movel	%d0,%a2@(Lconsole_struct_num_columns)
	movel	%d1,%a2@(Lconsole_struct_num_rows)

	/*
	 *	Clear the current row and column
	 */
	clrl	%a2@(Lconsole_struct_cur_column)
	clrl	%a2@(Lconsole_struct_cur_row)
	clrl	%a2@(Lconsole_struct_left_edge)

	/*
	 * Initialization is complete ... now output some
	 * debugging information
	 */
#ifdef CONSOLE_PENGUIN
	jbsr	console_put_penguin
#endif
Lconsole_put_stats:
	putr()
	puts("MacLinux")
	putr()
	putr()

#if defined(SERIAL_DEBUG)
	puts(" vidaddr:")
	lea	%pc@(SYMBOL_NAME(mac_videobase)),%a0
	movel	%a0@,%d7			/* video addr. */
	jbsr	Lserial_putnum			/* This redirects to console */
	putr()

	puts("  _stext:")
	lea	%pc@(SYMBOL_NAME(_stext)),%a0
	movel	%a0,%d7		/* get start addr. */
	jbsr	Lserial_putnum
	putr()

	puts("bootinfo:")	
	lea	%pc@(SYMBOL_NAME(_end)),%a0
	movel	%a0, %d7	/* write start addr. */
	jbsr	Lserial_putnum
	putr()

	puts("     kpt:")
	lea	%pc@(SYMBOL_NAME(kpt)),%a0
	movel	%a0,%d7		/* get start addr. */
	jbsr	Lserial_putnum
	putr()

	puts("    *kpt:")
	lea	%pc@(SYMBOL_NAME(kpt)),%a0
	movel	%a0@,%d7	/* get start addr. */
	jbsr	Lserial_putnum
	putr()

	puts("cpuid:")
	lea	%pc@(SYMBOL_NAME(Lcputype)),%a0
	movel	%a0@,%d7
	jbsr	Lserial_putnum
	putr()

#  if defined(MMU_PRINT)
	jbsr	mmu_print_machine_cpu_types
#  endif /* MMU_PRINT */
#endif /* SERIAL_DEBUG */
	
	moveml	%sp@+,%a0-%a4/%d0-%d7
	rts

#ifdef CONSOLE_PENGUIN
console_put_penguin:
	/*
	 *	Get 'that_penguin' onto the screen in the upper right corner
	 *	penguin is 64 x 74 pixels, align against right edge of screen
	 */
	moveml	%a0-%a1/%d0-%d7,%sp@-

	lea	%pc@(SYMBOL_NAME(mac_dimensions)),%a0
	movel	%a0@,%d0
	andil	#0xffff,%d0
	subil	#64,%d0		/* snug up against the right edge */
	clrl	%d1		/* start at the top */
	movel	#73,%d7
	lea	%pc@(SYMBOL_NAME(that_penguin)),%a1
console_penguin_row:
	movel	#31,%d6
console_penguin_pixel_pair:
	moveb	%a1@,%d2
	lsrb	#4,%d2
	jbsr	console_plot_pixel
	addq	#1,%d0
	moveb	%a1@+,%d2
	jbsr	console_plot_pixel
	addq	#1,%d0
	dbra	%d6,console_penguin_pixel_pair

	subil	#64,%d0
	addq	#1,%d1
	dbra	%d7,console_penguin_row

	moveml	%sp@+,%a0-%a1/%d0-%d7
	rts
#endif

console_scroll:
	moveml	%a0-%a4/%d0-%d7,%sp@-

	/*
	 * Calculate source and destination addresses
	 *	output	a1 = dest
	 *		a2 = source
	 */	
	lea	%pc@(SYMBOL_NAME(mac_videobase)),%a0
	movel	%a0@,%a1
	movel	%a1,%a2
	lea	%pc@(SYMBOL_NAME(mac_rowbytes)),%a0
	movel	%a0@,%d5
	movel	%pc@(SYMBOL_NAME(Lconsole_font)),%a0
	mulul	%a0@(FBCON_FONT_DESC_height),%d5	/* account for # scan lines per character */
	addal	%d5,%a2

	/*
	 * Get dimensions
	 */
	lea	%pc@(SYMBOL_NAME(mac_dimensions)),%a0
	movel	%a0@,%d3
	movel	%d3,%d4
	swap	%d4
	andl	#0xffff,%d3	/* d3 = screen width in pixels */
	andl	#0xffff,%d4	/* d4 = screen height in pixels */

	/*
	 * Calculate number of bytes to move
	 */
	lea	%pc@(SYMBOL_NAME(mac_rowbytes)),%a0
	movel	%a0@,%d6
	movel	%pc@(SYMBOL_NAME(Lconsole_font)),%a0
	subl	%a0@(FBCON_FONT_DESC_height),%d4	/* we're not scrolling the top row! */
	mulul	%d4,%d6		/* scan line bytes x num scan lines */
	divul	#32,%d6		/* we'll move 8 longs at a time */
	subq	#1,%d6
	
console_scroll_loop:
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	dbra	%d6,console_scroll_loop

	lea	%pc@(SYMBOL_NAME(mac_rowbytes)),%a0
	movel	%a0@,%d6
	movel	%pc@(SYMBOL_NAME(Lconsole_font)),%a0
	mulul	%a0@(FBCON_FONT_DESC_height),%d6	/* scan line bytes x font height */
	divul	#32,%d6			/* we'll move 8 words at a time */
	subq	#1,%d6

	moveq	#-1,%d0
console_scroll_clear_loop:
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	dbra	%d6,console_scroll_clear_loop
	
	moveml	%sp@+,%a0-%a4/%d0-%d7
	rts

	
Lconsole_putc:	
/*
 * Output character in d7 on console.
 */
	moveml	%a0/%a1/%d0-%d7,%sp@-
	
	lea	%pc@(Lconsole_globals),%a0

	cmpib	#10,%d7
	jne	console_not_lf
	movel	%a0@(Lconsole_struct_cur_row),%d0
	addil	#1,%d0
	movel	%d0,%a0@(Lconsole_struct_cur_row)
	movel	%a0@(Lconsole_struct_num_rows),%d1
	cmpl	%d1,%d0
	jcs	1f
	subil	#1,%d0
	movel	%d0,%a0@(Lconsole_struct_cur_row)
	jbsr	console_scroll
1:
	jra	console_exit
	
console_not_lf:
	cmpib	#13,%d7
	jne	console_not_cr
	clrl	%a0@(Lconsole_struct_cur_column)
	jra	console_exit

console_not_cr:
	cmpib	#1,%d7
	jne	console_not_home
	clrl	%a0@(Lconsole_struct_cur_row)
	clrl	%a0@(Lconsole_struct_cur_column)
	jra	console_exit
	
/*
 *	At this point we know that the %d7 character is going to be
 *	rendered on the screen.  Register usage is -
 *		a0 = pointer to console globals
 *		a1 = font data
 *		d0 = cursor column
 *		d1 = cursor row to draw the character
 *		d7 = character number
 */
console_not_home:
	movel	%a0@(Lconsole_struct_cur_column),%d0
	addil	#1,%a0@(Lconsole_struct_cur_column)
	movel	%a0@(Lconsole_struct_num_columns),%d1	
	cmpl	%d1,%d0
	jcs	1f
	movel	%d7,%sp@-
	putr()		/* recursion is OK! */
	movel	%sp@+,%d7
1:	
	movel	%a0@(Lconsole_struct_cur_row),%d1
	
	/*
	 *	At this point we make a shift in register usage
 	 *	a0 = address of pointer to font data (fbcon_font_desc)
	 */
	movel	%pc@(SYMBOL_NAME(Lconsole_font)),%a0
	movel	%a0@(FBCON_FONT_DESC_data),%a1	/* Load fbcon_font_desc.data into a1 */
	andl	#0x000000ff,%d7
		/* ASSERT: a0 = contents of Lconsole_font */
	mulul	%a0@(FBCON_FONT_DESC_height),%d7	/* d7 = index into font data */
	addl	%d7,%a1			/* a1 = points to char image */
	
	/*
	 *	At this point we make a shift in register usage
	 *	d0 = pixel coordinate, x
	 *	d1 = pixel coordinate, y
	 *	d2 = (bit 0) 1/0 for white/black (!) pixel on screen
	 *	d3 = font scan line data (8 pixels)
	 *	d6 = count down for the font's pixel width (8)
	 *	d7 = count down for the font's pixel count in height
	 */
		/* ASSERT: a0 = contents of Lconsole_font */
	mulul	%a0@(FBCON_FONT_DESC_width),%d0
	mulul	%a0@(FBCON_FONT_DESC_height),%d1
	movel	%a0@(FBCON_FONT_DESC_height),%d7	/* Load fbcon_font_desc.height into d7 */
	subq	#1,%d7
console_read_char_scanline:
	moveb	%a1@+,%d3

		/* ASSERT: a0 = contents of Lconsole_font */
	movel	%a0@(FBCON_FONT_DESC_width),%d6	/* Load fbcon_font_desc.width into d6 */
	subql	#1,%d6

console_do_font_scanline:
	lslb	#1,%d3
	scsb	%d2		/* convert 1 bit into a byte */
	jbsr	console_plot_pixel
	addq	#1,%d0
	dbra	%d6,console_do_font_scanline
	
		/* ASSERT: a0 = contents of Lconsole_font */
	subl	%a0@(FBCON_FONT_DESC_width),%d0
	addq	#1,%d1
	dbra	%d7,console_read_char_scanline
	
console_exit:		
	moveml	%sp@+,%a0/%a1/%d0-%d7
	rts

console_plot_pixel:
	/*
	 *	Input:
	 *		d0 = x coordinate
	 *		d1 = y coordinate
	 *		d2 = (bit 0) 1/0 for white/black (!)
	 *	All registers are preserved
	 */
	moveml	%a0-%a1/%d0-%d4,%sp@-
	
	lea	%pc@(SYMBOL_NAME(mac_videobase)),%a0
	movel	%a0@,%a1
	lea	%pc@(SYMBOL_NAME(mac_videodepth)),%a0
	movel	%a0@,%d3
	lea	%pc@(SYMBOL_NAME(mac_rowbytes)),%a0
	mulul	%a0@,%d1

	/*
	 *	Register usage:
	 *		d0 = x coord becomes byte offset into frame buffer
	 *		d1 = y coord
	 *		d2 = black or white (0/1)
	 *		d3 = video depth
	 *		d4 = temp of x (d0) for many bit depths
	 *		d5 = unused
	 *		d6 = unused
	 *		d7 = unused
	 */
test_1bit:
	cmpb	#1,%d3
	jbne	test_2bit
	movel	%d0,%d4		/* we need the low order 3 bits! */
	divul	#8,%d0
	addal	%d0,%a1
	addal	%d1,%a1
	andb	#7,%d4
	eorb	#7,%d4		/* reverse the x-coordinate w/ screen-bit # */
	andb	#1,%d2
	jbne	white_1
	bsetb	%d4,%a1@
	jbra	console_plot_pixel_exit
white_1:
	bclrb	%d4,%a1@
	jbra	console_plot_pixel_exit

test_2bit:
	cmpb	#2,%d3
	jbne	test_4bit
	movel	%d0,%d4		/* we need the low order 2 bits! */
	divul	#4,%d0
	addal	%d0,%a1
	addal	%d1,%a1
	andb	#3,%d4
	eorb	#3,%d4		/* reverse the x-coordinate w/ screen-bit # */
	lsll	#1,%d4		/* ! */
	andb	#1,%d2
	jbne	white_2
	bsetb	%d4,%a1@
	addq	#1,%d4
	bsetb	%d4,%a1@
	jbra	console_plot_pixel_exit
white_2:
	bclrb	%d4,%a1@
	addq	#1,%d4
	bclrb	%d4,%a1@
	jbra	console_plot_pixel_exit

test_4bit:
	cmpb	#4,%d3
	jbne	test_8bit
	movel	%d0,%d4		/* we need the low order bit! */
	divul	#2,%d0
	addal	%d0,%a1
	addal	%d1,%a1
	andb	#1,%d4
	eorb	#1,%d4
	lsll	#2,%d4		/* ! */
	andb	#1,%d2
	jbne	white_4
	bsetb	%d4,%a1@
	addq	#1,%d4
	bsetb	%d4,%a1@
	addq	#1,%d4
	bsetb	%d4,%a1@
	addq	#1,%d4
	bsetb	%d4,%a1@
	jbra	console_plot_pixel_exit
white_4:
	bclrb	%d4,%a1@
	addq	#1,%d4
	bclrb	%d4,%a1@
	addq	#1,%d4
	bclrb	%d4,%a1@
	addq	#1,%d4
	bclrb	%d4,%a1@
	jbra	console_plot_pixel_exit

test_8bit:
	cmpb	#8,%d3
	jbne	test_16bit
	addal	%d0,%a1
	addal	%d1,%a1
	andb	#1,%d2
	jbne	white_8
	moveb	#0xff,%a1@
	jbra	console_plot_pixel_exit
white_8:
	clrb	%a1@
	jbra	console_plot_pixel_exit

test_16bit:
	cmpb	#16,%d3
	jbne	console_plot_pixel_exit
	addal	%d0,%a1
	addal	%d0,%a1
	addal	%d1,%a1
	andb	#1,%d2
	jbne	white_16
	clrw	%a1@
	jbra	console_plot_pixel_exit
white_16:
	movew	#0x0fff,%a1@
	jbra	console_plot_pixel_exit

console_plot_pixel_exit:
	moveml	%sp@+,%a0-%a1/%d0-%d4
	rts
#endif /* CONSOLE */

Lconsole_video_virtual:
	.long	0

#if 0
/*
 * This is some old code lying around.  I don't believe
 * it's used or important anymore.  My guess is it contributed
 * to getting to this point, but it's done for now.
 * It was still in the 2.1.77 head.S, so it's still here.
 * (And still not used!)
 */
Lshowtest:
	moveml	%a0/%d7,%sp@-
	puts("A=")
	putn(%a1)

	.long	0xf0119f15		| ptestr	#5,%a1@,#7,%a0

	puts("DA=")
	putn(%a0)

	puts("D=")
	putn(%a0@)

	puts("S=")
	lea	%pc@(Lmmu),%a0
	.long	0xf0106200		| pmove		%psr,%a0@
	clrl	%d7
	movew	%a0@,%d7
	jbsr	Lserial_putnum

	putr()
	moveml	%sp@+,%a0/%d7
	rts
#endif
	
	.data
	.align	4
	
#if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA)
Lcustom:
Liobase:
	.long 0
#endif

#if defined(CONFIG_M68020) || defined(CONFIG_M68030)
Lmmu:
	.quad 0
#endif
	
#if defined(CONSOLE)
Lconsole_globals:
	.long	0		/* cursor column */
	.long	0		/* cursor row */
	.long	0		/* max num columns */
	.long	0		/* max num rows */
	.long	0		/* left edge */
	.long	0		/* mac putc */
Lconsole_font:
	.long	0		/* pointer to console font (struct fbcon_font_desc) */
#endif /* CONSOLE */

#if defined(MMU_PRINT)
Lmmu_print_data:
	.long	0		/* valid flag */
	.long	0		/* start logical */
	.long	0		/* next logical */
	.long	0		/* start physical */
	.long	0		/* next physical */
#endif /* MMU_PRINT */

Lcputype:
	.long	0

Lmmu_cached_page_tables:
	.long	0

Lmmu_cached_pointer_tables:
	.long	0

Lmmu_num_page_tables:
	.long	0

Lmmu_num_pointer_tables:
	.long	0

#if defined (CONFIG_BVME6000)
BVME_SCC_CTRL_A	= 0xffb0000b
BVME_SCC_DATA_A	= 0xffb0000f
#endif

#if 0
#if defined(CONFIG_ATARI)
SYMBOL_NAME_LABEL(atari_mch_type)
	 .long 0
#endif
#endif

#if defined(CONFIG_MAC)
SYMBOL_NAME_LABEL(mac_booter_data)
       .long 0
SYMBOL_NAME_LABEL(mac_videobase)
       .long 0
SYMBOL_NAME_LABEL(mac_videodepth)
       .long 0
SYMBOL_NAME_LABEL(mac_dimensions)
       .long 0
SYMBOL_NAME_LABEL(mac_rowbytes)
       .long 0
#endif

SYMBOL_NAME_LABEL(kpt)
	.long 0
SYMBOL_NAME_LABEL(availmem)
	.long 0
SYMBOL_NAME_LABEL(m68k_pgtable_cachemode)
	.long 0
#ifdef CONFIG_060_WRITETHROUGH
SYMBOL_NAME_LABEL(m68k_supervisor_cachemode)
	.long 0
#endif
#if defined(CONFIG_MVME16x)
SYMBOL_NAME_LABEL(mvme_bdid_ptr)
	.long 0
#endif